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* target/arm/arm-powerctl: Fix psci info return valuesAndrew Jones2017-03-141-2/+2
* target/arm: implement armv8 PMUSERENR (user-mode enable bits)Andrew Baumann2017-03-141-8/+71
* target/arm/helper: make it clear the EC field is also in hexAlex Bennée2017-03-091-1/+1
* KVM: do not use sigtimedwait to catch SIGBUSPaolo Bonzini2017-03-031-5/+0Star
* KVM: remove kvm_arch_on_sigbusPaolo Bonzini2017-03-031-5/+0Star
* target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K2017-02-281-0/+2
* armv7m: Raise correct kind of UsageFault for attempts to execute ARM codePeter Maydell2017-02-283-2/+11
* armv7m: Check exception return consistencyPeter Maydell2017-02-282-12/+112
* armv7m: Extract "exception taken" code into functionsPeter Maydell2017-02-281-50/+68
* armv7m: Simpler and faster exception startMichael Davidsaver2017-02-281-6/+9
* armv7m: Remove unused armv7m_nvic_acknowledge_irq() return valuePeter Maydell2017-02-282-2/+2
* armv7m: Escalate exceptions to HardFault if necessaryMichael Davidsaver2017-02-281-2/+0Star
* armv7m: Fix condition check for taking exceptionsPeter Maydell2017-02-282-8/+16
* Add missing fp_access_check() to aarch64 crypto instructionsNick Reilly2017-02-281-0/+12
* tcg: enable MTTCG by default for ARM on x86 hostsAlex Bennée2017-02-241-0/+3
* target-arm: ensure all cross vCPUs TLB flushes completeAlex Bennée2017-02-241-96/+69Star
* target-arm: don't generate WFE/YIELD calls for MTTCGAlex Bennée2017-02-243-6/+29
* target-arm/powerctl: defer cpu reset work to CPU contextAlex Bennée2017-02-247-74/+201
* cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée2017-02-241-44/+72
* tcg: drop global lock during TCG code executionJan Kiszka2017-02-242-4/+45
* target-arm: Enable vPMU support under TCG modeWei Huang2017-02-102-7/+2Star
* target-arm: Add support for PMU register PMINTENSET_EL1Wei Huang2017-02-102-2/+10
* target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0Wei Huang2017-02-102-6/+25
* target-arm: Add support for PMU register PMSELR_EL0Wei Huang2017-02-102-6/+22
* target/arm: A32, T32: Create Instruction Syndromes for Data AbortsPeter Maydell2017-02-073-63/+149
* target/arm: Abstract out pbit/wbit tests in ARM ldr/str decodePeter Maydell2017-02-071-3/+6
* arm: Correctly handle watchpoints for BE32 CPUsJulian Brown2017-02-073-0/+30
* Fix Thumb-1 BE32 execution and disassembly.Julian Brown2017-02-072-1/+32
* target/arm: Add cfgend parameter for ARM CPU selection.Julian Brown2017-02-072-0/+20
* arm: add trailing ; after MISMATCH_CHECKMichael S. Tsirkin2017-02-011-49/+49
* arm: better stub version for MISMATCH_CHECKMichael S. Tsirkin2017-02-011-1/+3
* armv7m: R14 should reset to 0xffffffffPeter Maydell2017-01-271-0/+3
* armv7m: FAULTMASK should be 0 on resetMichael Davidsaver2017-01-271-4/+6
* armv7m: Report no-coprocessor faults correctlyPeter Maydell2017-01-273-0/+13
* armv7m: set CFSR.UNDEFINSTR on undefined instructionsMichael Davidsaver2017-01-271-0/+1
* armv7m: honour CCR.STACKALIGN on exception entryMichael Davidsaver2017-01-271-4/+2Star
* armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFARPeter Maydell2017-01-273-2/+69
* target/arm: Drop IS_M() macroPeter Maydell2017-01-273-8/+2Star
* armv7m: Clear FAULTMASK on return from non-NMI exceptionsMichael Davidsaver2017-01-271-1/+6
* armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver2017-01-274-17/+32
* armv7m: Explicit error for bad vector tableMichael Davidsaver2017-01-271-1/+25
* armv7m: Replace armv7m.hack with unassigned_access handlerMichael Davidsaver2017-01-272-6/+34
* armv7m: MRS/MSR: handle unprivileged accessMichael Davidsaver2017-01-271-42/+37Star
* migration: extend VMStateInfoJianjun Duan2017-01-241-4/+10
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2017-01-201-1/+1
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| * kvm: move cpu synchronization codeVincent Palatin2017-01-191-1/+1
* | target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell2017-01-203-0/+16
* | target/arm/psci.c: If EL2 implemented, start CPUs in EL2Peter Maydell2017-01-201-7/+18
* | target-arm: Add ARMCPU fields for GIC CPU i/f configPeter Maydell2017-01-202-0/+11
* | target-arm: Expose output GPIO line for VCPU maintenance interruptPeter Maydell2017-01-202-0/+5
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