summaryrefslogtreecommitdiffstats
path: root/target/arm
Commit message (Expand)AuthorAgeFilesLines
* target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread modePeter Maydell2017-07-111-3/+10
* ARM: KVM: Enable in-kernel timers with user space gicAlexander Graf2017-07-112-0/+54
* target/arm: Exit after clearing aarch64 interrupt maskRichard Henderson2017-06-191-1/+6
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2017-06-062-1/+3
|\
| * numa: move numa_node from CPUState into target specific classesIgor Mammedov2017-06-052-1/+3
* | target/aarch64: optimize indirect branchesEmilio G. Cota2017-06-051-2/+1Star
* | target/aarch64: optimize cross-page direct jumps in softmmuEmilio G. Cota2017-06-051-1/+1
* | target/arm: optimize indirect branchesEmilio G. Cota2017-06-052-9/+20
* | target/arm: optimize cross-page direct jumps in softmmuEmilio G. Cota2017-06-051-1/+5
* | target/arm: add data cache invalidation cp15 instruction to cortex-r5Luc MICHEL2017-06-041-0/+2
|/
* arm: Implement HFNMIENA support for M profile MPUPeter Maydell2017-06-023-2/+41
* arm: add MPU support to M profile CPUsMichael Davidsaver2017-06-023-3/+33
* armv7m: Classify faults as MemManage or BusFaultMichael Davidsaver2017-06-021-3/+42
* arm: All M profile cores are PMSAPeter Maydell2017-06-021-0/+8
* armv7m: Implement M profile default memory mapMichael Davidsaver2017-06-021-9/+32
* armv7m: Improve "-d mmu" tracing for PMSAv7 MPUMichael Davidsaver2017-06-021-12/+27
* arm: Remove unnecessary check on cpu->pmsav7_dregionPeter Maydell2017-06-021-2/+1Star
* arm: Don't let no-MPU PMSA cores write to SCTLR.MPeter Maydell2017-06-021-0/+5
* arm: Don't clear ARM_FEATURE_PMSA for no-mpu configsPeter Maydell2017-06-021-1/+7
* arm: Clean up handling of no-MPU PMSA CPUsPeter Maydell2017-06-024-14/+14
* arm: Use different ARMMMUIdx values for M profilePeter Maydell2017-06-023-2/+27
* arm: Add support for M profile CPUs having different MMU index semanticsPeter Maydell2017-06-026-99/+156
* arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access()Peter Maydell2017-06-021-1/+1
* target/arm: clear PMUVER field of AA64DFR0 when vPMU=offWei Huang2017-06-021-1/+1
* shutdown: Add source information to SHUTDOWN and RESETEric Blake2017-05-231-2/+2
* virt-arm: add node-id property to CPUIgor Mammedov2017-05-111-0/+1
* hw/arm/virt: extract mp-affinity calculation in separate functionIgor Mammedov2017-05-112-3/+11
* arm: Remove workarounds for old M-profile exception return implementationPeter Maydell2017-04-202-49/+2Star
* arm: Implement M profile exception return properlyPeter Maydell2017-04-202-6/+64
* arm: Track M profile handler mode state in TB flagsPeter Maydell2017-04-203-0/+11
* arm: Abstract out "are we singlestepping" test to utility functionPeter Maydell2017-04-201-5/+15
* arm: Move condition-failed codepath generation out of if()Peter Maydell2017-04-201-13/+11Star
* arm: Move gen_set_condexec() and gen_set_pc_im() up in the filePeter Maydell2017-04-201-16/+15Star
* arm: Factor out "generate right kind of step exception"Peter Maydell2017-04-201-12/+16
* arm: Thumb shift operations should not permit interworking branchesPeter Maydell2017-04-201-1/+1
* arm: Don't implement BXJ on M-profile CPUsPeter Maydell2017-04-201-1/+6
* arm/kvm: Remove trailing newlines from error_report()Ishani Chugh2017-04-201-2/+2
* target/arm: Add assertion about FSC format for syndrome registersPeter Maydell2017-04-201-5/+18
* arm: Move excnames[] array into arm_log_exceptions()Peter Maydell2017-04-203-24/+20Star
* target/arm: Add missing entries to excnames[] for log stringsPeter Maydell2017-04-202-0/+3
* arm: Fix APSR writes via M profile MSRPeter Maydell2017-03-202-5/+24
* arm: Enforce should-be-1 bits in MRS decodingPeter Maydell2017-03-201-0/+14
* arm: Don't decode MRS(banked) or MSR(banked) for M profilePeter Maydell2017-03-201-2/+4
* arm: HVC and SMC encodings don't exist for M profilePeter Maydell2017-03-201-0/+3
* target/arm/arm-powerctl: Fix psci info return valuesAndrew Jones2017-03-141-2/+2
* target/arm: implement armv8 PMUSERENR (user-mode enable bits)Andrew Baumann2017-03-141-8/+71
* target/arm/helper: make it clear the EC field is also in hexAlex Bennée2017-03-091-1/+1
* KVM: do not use sigtimedwait to catch SIGBUSPaolo Bonzini2017-03-031-5/+0Star
* KVM: remove kvm_arch_on_sigbusPaolo Bonzini2017-03-031-5/+0Star
* target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K2017-02-281-0/+2
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2026-05-07 15:47:14 +0200