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Experimental fork of QEMU with video encoding patches
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arm
Commit message (
Expand
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Author
Age
Files
Lines
*
bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations
Peter Maydell
2021-06-16
1
-20
/
+0
*
target/arm: Move expand_pred_b() data to vec_helper.c
Peter Maydell
2021-06-16
3
-99
/
+109
*
target/arm: Add framework for MVE decode
Peter Maydell
2021-06-16
5
-0
/
+53
*
target/arm: Implement MVE LETP insn
Peter Maydell
2021-06-16
2
-9
/
+97
*
target/arm: Implement MVE DLSTP
Peter Maydell
2021-06-16
2
-5
/
+27
*
target/arm: Implement MVE WLSTP insn
Peter Maydell
2021-06-16
2
-3
/
+42
*
target/arm: Implement MVE LCTP
Peter Maydell
2021-06-16
2
-0
/
+26
*
target/arm: Let vfp_access_check() handle late NOCP checks
Peter Maydell
2021-06-16
1
-5
/
+15
*
target/arm: Add handling for PSR.ECI/ICI
Peter Maydell
2021-06-16
5
-5
/
+133
*
target/arm: Handle VPR semantics in existing code
Peter Maydell
2021-06-16
3
-11
/
+57
*
target/arm: Enable FPSCR.QC bit for MVE
Peter Maydell
2021-06-16
2
-10
/
+23
*
target/arm: Provide and use H8 and H1_8 macros
Peter Maydell
2021-06-16
3
-137
/
+143
*
target/arm: Fix mte page crossing test
Richard Henderson
2021-06-16
1
-1
/
+1
*
target/arm: Diagnose UNALLOCATED in disas_simd_three_reg_same_fp16
Richard Henderson
2021-06-15
1
-30
/
+48
*
target/arm: Remove fprintf from disas_simd_mod_imm
Richard Henderson
2021-06-15
1
-1
/
+0
*
target/arm: Diagnose UNALLOCATED in disas_simd_two_reg_misc_fp16
Richard Henderson
2021-06-15
1
-2
/
+2
*
target/arm: Enable BFloat16 extensions
Richard Henderson
2021-06-03
3
-0
/
+7
*
target/arm: Implement bfloat widening fma (indexed)
Richard Henderson
2021-06-03
7
-1
/
+82
*
target/arm: Implement bfloat widening fma (vector)
Richard Henderson
2021-06-03
7
-4
/
+73
*
target/arm: Implement bfloat16 matrix multiply accumulate
Richard Henderson
2021-06-03
7
-3
/
+81
*
target/arm: Implement bfloat16 dot product (indexed)
Richard Henderson
2021-06-03
7
-9
/
+80
*
target/arm: Implement bfloat16 dot product (vector)
Richard Henderson
2021-06-03
7
-0
/
+89
*
target/arm: Implement vector float32 to bfloat16 conversion
Richard Henderson
2021-06-03
9
-0
/
+95
*
target/arm: Implement scalar float32 to bfloat16 conversion
Richard Henderson
2021-06-03
5
-0
/
+51
*
target/arm: Unify unallocated path in disas_fp_1src
Richard Henderson
2021-06-03
1
-9
/
+6
*
target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16
Richard Henderson
2021-06-03
1
-0
/
+15
*
target/arm: use raise_exception_ra for stack limit exception
Jamie Iles
2021-06-03
2
-10
/
+4
*
target/arm: use raise_exception_ra for MTE check failure
Jamie Iles
2021-06-03
1
-9
/
+3
*
target/arm: fold do_raise_exception into raise_exception
Jamie Iles
2021-06-03
1
-10
/
+2
*
target/arm: fix missing exception class
Jamie Iles
2021-06-03
1
-2
/
+9
*
target/arm: Mark LDS{MIN,MAX} as signed operations
Richard Henderson
2021-06-03
1
-3
/
+10
*
target/arm: Allow board models to specify initial NS VTOR
Peter Maydell
2021-06-03
2
-0
/
+12
*
target/arm: Make FPSCR.LTPSIZE writable for MVE
Peter Maydell
2021-06-03
3
-4
/
+9
*
target/arm: Implement M-profile VPR register
Peter Maydell
2021-06-03
3
-0
/
+63
*
target/arm: Fix return values in fp_sysreg_checks()
Peter Maydell
2021-06-03
1
-3
/
+3
*
target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dp
Peter Maydell
2021-06-03
1
-2
/
+13
*
target/arm: Move fpsp/fpdp isar check into callers of do_vfp_2op_sp/dp
Peter Maydell
2021-06-03
1
-18
/
+19
*
target/arm: Update feature checks for insns which are "MVE or FP"
Peter Maydell
2021-06-03
1
-19
/
+29
*
target/arm: Add isar feature check functions for MVE
Peter Maydell
2021-06-03
1
-0
/
+22
*
docs: fix references to docs/devel/tracing.rst
Stefano Garzarella
2021-06-02
1
-1
/
+1
*
hw/core: Constify TCGCPUOps
Richard Henderson
2021-05-27
2
-2
/
+2
*
cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Move CPUClass::write_elf* to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-2
/
+2
*
cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Move CPUClass::vmsd to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Introduce SysemuCPUOps structure
Philippe Mathieu-Daudé
2021-05-27
1
-0
/
+8
*
cpu: Rename CPUClass vmsd -> legacy_vmsd
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
target/arm: Enable SVE2 and related extensions
Richard Henderson
2021-05-25
3
-0
/
+16
*
target/arm: Implement integer matrix multiply accumulate
Richard Henderson
2021-05-25
7
-0
/
+169
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