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* Merge tag 'pull-semi-20220914' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi2022-09-172-23/+5Star
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| * target/arm: Honour -semihosting-config userspace=onPeter Maydell2022-09-132-23/+5Star
| * semihosting: Allow optional use of semihosting from userspacePeter Maydell2022-09-132-4/+4
* | target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max'Peter Maydell2022-09-142-2/+2
* | target/arm: Support 64-bit event counters for FEAT_PMUv3p5Peter Maydell2022-09-143-9/+57
* | target/arm: Implement FEAT_PMUv3p5 cycle counter disable bitsPeter Maydell2022-09-142-4/+37
* | target/arm: Rename pmu_8_n feature test functionsPeter Maydell2022-09-142-17/+17
* | target/arm: Detect overflow when calculating next PMU interruptPeter Maydell2022-09-141-8/+14
* | target/arm: Honour MDCR_EL2.HPMD in Secure EL2Peter Maydell2022-09-141-10/+7Star
* | target/arm: Ignore PMCR.D when PMCR.LC is setPeter Maydell2022-09-141-4/+13
* | target/arm: Don't mishandle count when enabling or disabling PMU countersPeter Maydell2022-09-141-0/+45
* | target/arm: Correct value returned by pmu_counter_mask()Peter Maydell2022-09-141-1/+1
* | target/arm: Don't corrupt high half of PMOVSR when cycle counter overflowsPeter Maydell2022-09-141-1/+1
* | target/arm: Add missing space in commentPeter Maydell2022-09-141-1/+1
* | target/arm: Advertise FEAT_ETS for '-cpu max'Peter Maydell2022-09-142-0/+5
* | target/arm: Implement ID_DFR1Peter Maydell2022-09-143-2/+5
* | target/arm: Implement ID_MMFR5Peter Maydell2022-09-143-2/+5
* | target/arm: Sort KVM reads of AArch32 ID registers into encoding orderPeter Maydell2022-09-141-2/+2
* | target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8Peter Maydell2022-09-141-5/+60
* | target/arm: Add cortex-a35Hao Wu2022-09-141-0/+80
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* accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson2022-09-061-2/+3
* target/arm: Don't report Statistical Profiling Extension in ID registersPeter Maydell2022-08-121-0/+11
* target/arm: display deprecation status in '-cpu help'Daniel P. Berrangé2022-08-051-1/+6
* Merge tag 'pull-target-arm-20220801' of https://git.linaro.org/people/pmaydel...Richard Henderson2022-08-011-23/+22Star
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| * target/arm: Move sve probe inside kvm >= 4.15 branchRichard Henderson2022-08-011-11/+11
| * target/arm: Set KVM_ARM_VCPU_SVE while probing the hostRichard Henderson2022-08-011-14/+13Star
| * target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_featuresRichard Henderson2022-08-011-1/+1
* | trivial: Fix duplicated wordsThomas Huth2022-08-011-1/+1
* | misc: fix commonly doubled up wordsDaniel P. Berrangé2022-08-011-1/+1
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* kvm: don't use perror() without useful errnoCornelia Huck2022-07-291-1/+1
* target/arm: Add MO_128 entry to pred_esz_masks[]Peter Maydell2022-07-262-3/+4
* target/arm: Don't set syndrome ISS for loads and stores with writebackPeter Maydell2022-07-181-1/+3
* target/arm: Honour VTCR_EL2 bits in Secure EL2Peter Maydell2022-07-182-3/+38
* target/arm: Store TCR_EL* registers as uint64_tPeter Maydell2022-07-186-68/+27Star
* target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_tPeter Maydell2022-07-184-14/+12Star
* target/arm: Fix big-endian host handling of VTCRPeter Maydell2022-07-181-1/+1
* target/arm: Fold regime_tcr() and regime_tcr_value() togetherPeter Maydell2022-07-184-18/+12Star
* target/arm: Calculate mask/base_mask in get_level1_table_address()Peter Maydell2022-07-181-5/+9
* target/arm: Define and use new regime_tcr_value() functionPeter Maydell2022-07-184-8/+14
* linux-user/aarch64: Do not clear PROT_MTE on mprotectRichard Henderson2022-07-181-2/+5
* target/arm: Fix aarch64_sve_change_el for SMERichard Henderson2022-07-181-6/+25
* target/arm: Fill in VL for tbflags when SME enabled and SVE disabledRichard Henderson2022-07-181-2/+8
* target/arm: Enable SME for user-onlyRichard Henderson2022-07-111-0/+11
* target/arm: Only set ZEN in reset if SVE presentRichard Henderson2022-07-111-4/+3Star
* target/arm: Enable SME for -cpu maxRichard Henderson2022-07-111-0/+11
* target/arm: Reset streaming sve state on exception boundariesRichard Henderson2022-07-111-2/+13
* target/arm: Implement SCLAMP, UCLAMPRichard Henderson2022-07-114-0/+149
* target/arm: Implement REVDRichard Henderson2022-07-114-0/+21
* target/arm: Implement PSELRichard Henderson2022-07-112-0/+77
* target/arm: Implement SME integer outer productRichard Henderson2022-07-114-0/+118
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