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path: root/target/i386/cpu.h
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* target/i386: add TCG support for UMIPGareth Webb2022-02-161-1/+3
* KVM: use KVM_{GET|SET}_SREGS2 when supported.Maxim Levitsky2022-01-121-0/+3
* KVM: SVM: add migration support for nested TSC scalingMaxim Levitsky2021-11-021-0/+4
* i386: Make Hyper-V version id configurableVitaly Kuznetsov2021-10-011-1/+6
* i386: Implement pseudo 'hv-avic' ('hv-apicv') enlightenmentVitaly Kuznetsov2021-10-011-0/+1
* i386: Support KVM_CAP_HYPERV_ENFORCE_CPUIDVitaly Kuznetsov2021-10-011-0/+1
* i386: Support KVM_CAP_ENFORCE_PV_FEATURE_CPUIDVitaly Kuznetsov2021-10-011-0/+3
* i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRsSean Christopherson2021-09-301-0/+1
* i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAXSean Christopherson2021-09-301-0/+1
* i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBXSean Christopherson2021-09-301-0/+1
* i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAXSean Christopherson2021-09-301-0/+1
* i386: Add primary SGX CPUID and MSR definesSean Christopherson2021-09-301-0/+12
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-221-7/+0Star
* user: Remove cpu_get_pic_interrupt() stubsPhilippe Mathieu-Daudé2021-09-141-1/+1
* target/i386: Restrict sysemu-only fpu_helper helpersPhilippe Mathieu-Daudé2021-09-141-0/+3
* target/i386: Added vVMLOAD and vVMSAVE featureLara Lazier2021-09-131-0/+2
* target/i386: Added changed priority check for VIRQLara Lazier2021-09-131-0/+15
* target/i386: Added VGIF V_IRQ masking capabilityLara Lazier2021-09-131-0/+2
* target/i386: Moved int_ctl into CPUX86State structureLara Lazier2021-09-131-0/+1
* target/i386: VMRUN and VMLOAD canonicalizationsLara Lazier2021-09-131-0/+2
* target/i386: add missing bits to CR4_RESERVED_MASKDaniel P. Berrangé2021-09-131-0/+1
* target/i386: Added consistency checks for EFERLara Lazier2021-07-221-0/+5
* target/i386: Added consistency checks for CR4Lara Lazier2021-07-221-0/+39
* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-misc-20210713' int...Peter Maydell2021-07-141-0/+2
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| * target/i386: Correct implementation for FCS, FIP, FDS and FDPZiqiao Kong2021-07-131-0/+2
* | target/i386: suppress CPUID leaves not defined by the CPU vendorMichael Roth2021-07-131-0/+3
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* target/i386: fix exceptions for MOV to DRPaolo Bonzini2021-07-091-0/+2
* target/i386: Move X86XSaveArea into TCGDavid Edmondson2021-07-061-57/+0Star
* target/i386: Populate x86_ext_save_areas offsets using cpuid where possibleDavid Edmondson2021-07-061-1/+1
* target/i386: Make x86_ext_save_areas visible outside cpu.cDavid Edmondson2021-07-061-0/+9
* target/i386: Pass buffer and length to XSAVE helperDavid Edmondson2021-07-061-2/+3
* target/i386: Clarify the padding requirements of X86XSaveAreaDavid Edmondson2021-07-061-1/+7
* target/i386: Consolidate the X86XSaveArea offset checksDavid Edmondson2021-07-061-7/+15
* target/i386: Declare constants for XSAVE offsetsDavid Edmondson2021-07-061-7/+23
* target/i386: kvm: add support for TSC scalingPaolo Bonzini2021-06-251-0/+1
* target/i386: Added consistency checks for CR0Lara Lazier2021-06-161-0/+2
* target/i386: Refactored intercept checks into cpu_svm_has_interceptLara Lazier2021-06-161-0/+4
* i386: drop FEAT_HYPERV feature leavesVitaly Kuznetsov2021-05-311-5/+0Star
* i386: stop using env->features[] for filling Hyper-V CPUIDsVitaly Kuznetsov2021-05-311-0/+1
* i386/cpu: Expose AVX_VNNI instruction to guestYang Zhong2021-05-261-0/+2
* target/i386: Inline user cpu_svm_check_intercept_paramRichard Henderson2021-05-191-0/+8
* target/i386: extend pg_mode to more CR0 and CR4 bitsPaolo Bonzini2021-05-111-0/+8
* target/i386: move paging mode constants from SVM to cpu.hPaolo Bonzini2021-05-111-0/+8
* i386: make cpu_load_efer sysemu-onlyClaudio Fontana2021-05-101-15/+5Star
* i386: separate fpu_helper sysemu-only partsClaudio Fontana2021-05-101-0/+3
* i386: split cpu accelerators from cpu.c, using AccelCPUClassClaudio Fontana2021-05-101-12/+8Star
* vmstate: Constify some VMStateDescriptionsKeqian Zhu2021-05-021-1/+1
* target/i386: allow modifying TCG phys-addr-bitsPaolo Bonzini2021-03-191-1/+0Star
* target/i386: Add bus lock debug exception supportChenyi Qiang2021-02-251-0/+2
* i386: Add the support for AMD EPYC 3rd generation processorsBabu Moger2021-02-191-0/+4
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