summaryrefslogtreecommitdiffstats
path: root/target/m68k
Commit message (Expand)AuthorAgeFilesLines
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2017-10-302-48/+30Star
|\
| * m68k: cleanup cpu type name compositionIgor Mammedov2017-10-272-48/+30Star
* | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-1/+1
|\ \ | |/ |/|
| * disas: Remove unused flags argumentsRichard Henderson2017-10-251-1/+1
* | tcg: Initialize cpu_env genericallyRichard Henderson2017-10-241-5/+0Star
* | tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota2017-10-241-1/+1
* | target/m68k: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota2017-10-243-15/+31
* | tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota2017-10-241-3/+3
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-6/+1Star
* | tcg: Remove TCGV_EQUAL*Richard Henderson2017-10-241-1/+1
|/
* qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé2017-10-101-4/+0Star
* target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()Kamil Rytarowski2017-09-101-22/+22
* target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova2017-09-061-1/+6
* m68k: replace cpu_m68k_init() with cpu_generic_init()Igor Mammedov2017-09-013-22/+3Star
* m68k/translate: fix incorrect copy/pastePhilippe Mathieu-Daudé2017-07-311-1/+1
* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-3/+2Star
* target/m68k: optimize bcd_flags() using extract opPhilippe Mathieu-Daudé2017-07-191-2/+1Star
* target/m68k: add fmovemLaurent Vivier2017-06-293-30/+189
* target/m68k: add explicit single and double precision operations (part 2)Laurent Vivier2017-06-293-8/+74
* target/m68k: add fsglmul and fsgldivLaurent Vivier2017-06-293-0/+36
* target/m68k: add explicit single and double precision operationsLaurent Vivier2017-06-293-5/+125
* target/m68k: add fmovecrLaurent Vivier2017-06-293-1/+47
* target/m68k: add fscc.Laurent Vivier2017-06-291-79/+131
* target-m68k: add FPCR and FPSRLaurent Vivier2017-06-216-119/+421
* target-m68k: define 96bit FP registers for gdb on 680x0Laurent Vivier2017-06-211-0/+45
* target-m68k: use floatx80 internallyLaurent Vivier2017-06-217-291/+509
* target-m68k: initialize FPU registersLaurent Vivier2017-06-211-1/+8
* target-m68k: move fmove CR to a functionLaurent Vivier2017-06-211-25/+31
* target-m68k: define ext_opsizeLaurent Vivier2017-06-151-19/+24
* target-m68k: move FPU helpers to fpu_helper.cLaurent Vivier2017-06-153-89/+113
* target/m68k: fix V flag for CC_OP_SUBxLaurent Vivier2017-06-151-1/+1
* target/m68k: implement rtdLaurent Vivier2017-06-073-0/+14
* Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...Peter Maydell2017-01-162-2/+4
|\
| * qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée2017-01-132-2/+4
* | target-m68k: increment/decrement with SPLaurent Vivier2017-01-141-2/+12
* | target-m68k: CAS doesn't need aligned accessLaurent Vivier2017-01-141-1/+0Star
* | target-m68k: manage pre-dec et post-inc in CASLaurent Vivier2017-01-141-0/+9
* | target-m68k: fix gen_flush_flags()Laurent Vivier2017-01-141-1/+2
* | target-m68k: fix bit operation with immediate valueLaurent Vivier2017-01-141-3/+10
* | target-m68k: Implement bfffoRichard Henderson2017-01-143-1/+62
* | target-m68k: Implement bitfield ops for memoryRichard Henderson2017-01-144-2/+333
* | target-m68k: Implement bitfield ops for registersRichard Henderson2017-01-141-0/+210
|/
* target-m68k: free TCG variables that are notLaurent Vivier2016-12-271-9/+32
* target-m68k: add rol/ror/roxl/roxr instructionsLaurent Vivier2016-12-271-0/+391
* target-m68k: Inline shiftsRichard Henderson2016-12-273-80/+201
* target-m68k: Do not cpu_abort on undefined insnsRichard Henderson2016-12-271-3/+5
* target-m68k: Implement 680x0 movemLaurent Vivier2016-12-271-23/+107
* target-m68k: add cas/cas2 opsLaurent Vivier2016-12-273-0/+265
* target-m68k: add abcd/sbcd/nbcdLaurent Vivier2016-12-271-0/+220
* target-m68k: add 680x0 divu/divs variantsLaurent Vivier2016-12-275-70/+211
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 19:44:37 +0100