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path: root/target/microblaze/helper.c
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* target/microblaze: Add security attributes on memory transactionsJoe Komlodi2021-01-271-3/+23
* microblaze tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* target/microblaze: Move mmu parameters to MicroBlazeCPUConfigRichard Henderson2020-09-071-2/+2
* target/microblaze: Move pvr regs to MicroBlazeCPUConfigRichard Henderson2020-09-071-1/+1
* target/microblaze: Rename mmu structsRichard Henderson2020-09-071-2/+2
* target/microblaze: Cleanup mb_cpu_do_interruptRichard Henderson2020-09-071-133/+106Star
* target/microblaze: Collected fixes for env->iflagsRichard Henderson2020-09-071-6/+11
* target/microblaze: Reduce linux-user address space to 32-bitRichard Henderson2020-09-011-2/+2
* target/microblaze: Convert brk and brki to decodetreeRichard Henderson2020-09-011-8/+2Star
* target/microblaze: Use cc->do_unaligned_accessRichard Henderson2020-09-011-0/+28
* target/microblaze: Move bimm to BIMM_FLAGRichard Henderson2020-09-011-1/+1
* target/microblaze: Remove empty D macrosRichard Henderson2020-09-011-7/+4Star
* target/microblaze: Split out MSR[C] to its own variableRichard Henderson2020-09-011-28/+30
* target/microblaze: Fix width of ESRRichard Henderson2020-09-011-1/+1
* target/microblaze: Fix width of MSRRichard Henderson2020-09-011-2/+2
* target/microblaze: Fix width of PC and BTARGETRichard Henderson2020-09-011-10/+6Star
* target/microblaze: Split out BTR from env->sregsRichard Henderson2020-09-011-2/+2
* target/microblaze: Split out ESR from env->sregsRichard Henderson2020-09-011-9/+9
* target/microblaze: Split out EAR from env->sregsRichard Henderson2020-09-011-3/+3
* target/microblaze: Split out MSR from env->sregsRichard Henderson2020-09-011-25/+24Star
* target/microblaze: Split out PC from env->sregsRichard Henderson2020-09-011-17/+17
* tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-6/+0Star
* target/microblaze: Convert to CPUClass::tlb_fillRichard Henderson2019-05-101-50/+57
* qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster2019-04-181-1/+1
* target-microblaze: Consolidate MMU enabled checksEdgar E. Iglesias2018-05-291-3/+3
* target-microblaze: Make special registers 64-bitEdgar E. Iglesias2018-05-291-5/+10
* target-microblaze: Bypass MMU with MMU_NOMMU_IDXEdgar E. Iglesias2018-05-291-1/+2
* target-microblaze: Remove USE_MMU PVR checksEdgar E. Iglesias2018-05-291-11/+1Star
* target-microblaze: Tighten up TCGv_i32 vs TCGv type usageEdgar E. Iglesias2018-05-291-1/+1
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-2/+2
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+307