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path: root/target/microblaze/mmu.c
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* target/microblaze: use MMUAccessType instead of int in mmu_translateJoe Komlodi2021-01-271-1/+1
* target/microblaze: Fix possible array out of bounds in mmu_write()AlexChen2020-11-171-1/+2
* microblaze tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* target/microblaze: Move mmu parameters to MicroBlazeCPUConfigRichard Henderson2020-09-071-13/+17
* target/microblaze: Rename mmu structsRichard Henderson2020-09-071-6/+5Star
* target/microblaze: Fix width of PC and BTARGETRichard Henderson2020-09-011-2/+2
* target/microblaze: Split out PC from env->sregsRichard Henderson2020-09-011-1/+1
* target/microblaze: Use env_cpu, env_archcpuRichard Henderson2019-06-101-3/+2Star
* target-microblaze: mmu: Correct masking of output addressesEdgar E. Iglesias2018-06-151-1/+0Star
* target-microblaze: mmu: Cleanup debug log messagesEdgar E. Iglesias2018-05-291-20/+19Star
* target-microblaze: Add support for extended access to TLBLOEdgar E. Iglesias2018-05-291-4/+14
* target-microblaze: mmu: Add a configurable output address maskEdgar E. Iglesias2018-05-291-0/+1
* target-microblaze: mmu: Prepare for 64-bit addressesEdgar E. Iglesias2018-05-291-7/+7
* target-microblaze: mmu: Remove unused register stateEdgar E. Iglesias2018-05-291-2/+5
* target-microblaze: mmu: Add R_TBLX_MISS macrosEdgar E. Iglesias2018-05-291-2/+3
* target-microblaze: Make special registers 64-bitEdgar E. Iglesias2018-05-291-1/+2
* target-microblaze: mmu: Make the TLBX MISS bit read-onlyEdgar E. Iglesias2018-04-301-0/+4
* target-microblaze: mmu: Make TLBSX write-onlyEdgar E. Iglesias2018-04-301-1/+4
* cputlb: drop flush_global flag from tlb_flushAlex Bennée2017-01-131-1/+1
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+303
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