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Experimental fork of QEMU with video encoding patches
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target
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mips
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mips-defs.h
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Author
Age
Files
Lines
*
target/mips: Add comments for vendor-specific ASEs
Jiaxun Yang
2020-06-15
1
-0
/
+4
*
target/mips: Legalize Loongson insn flags
Jiaxun Yang
2020-06-15
1
-2
/
+2
*
target/mips: Add Loongson-3 CPU definition
Huacai Chen
2020-06-09
1
-20
/
+25
*
target/mips: Clean up mips-defs.h
Aleksandar Markovic
2019-10-01
1
-26
/
+32
*
tcg: Split out target/arch/cpu-param.h
Richard Henderson
2019-06-10
1
-15
/
+0
*
target/mips: Define a bit for MXU in insn_flags
Craig Janeczek
2018-10-29
1
-0
/
+1
*
target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants
Fredrik Noring
2018-10-24
1
-0
/
+3
*
target/mips: Improve DSP R2/R3-related naming
Stefan Markovic
2018-10-18
1
-2
/
+2
*
target/mips: Add bit definitions for DSP R3 ASE
Stefan Markovic
2018-10-18
1
-0
/
+1
*
target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags)
Philippe Mathieu-Daudé
2018-10-18
1
-34
/
+44
*
target/mips: Add preprocessor constants for nanoMIPS
Aleksandar Markovic
2018-08-24
1
-0
/
+4
*
linux-user: Tidy and enforce reserved_va initialization
Richard Henderson
2017-10-16
1
-1
/
+5
*
Move target-* CPU file into a target/ folder
Thomas Huth
2016-12-20
1
-0
/
+91