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path: root/target/mips/mips-defs.h
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* target/mips: Remove vendor specific CPU definitionsPhilippe Mathieu-Daudé2021-01-141-5/+0Star
* target/mips: Remove CPU_NANOMIPS32 definitionPhilippe Mathieu-Daudé2021-01-141-3/+0Star
* target/mips: Remove CPU_R5900 definitionPhilippe Mathieu-Daudé2021-01-141-1/+0Star
* target/mips: Remove now unused ASE_MSA definitionPhilippe Mathieu-Daudé2021-01-141-1/+0Star
* target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6Philippe Mathieu-Daudé2021-01-141-2/+2
* target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5Philippe Mathieu-Daudé2021-01-141-2/+2
* target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3Philippe Mathieu-Daudé2021-01-141-2/+2
* target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2Philippe Mathieu-Daudé2021-01-141-2/+2
* target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1Philippe Mathieu-Daudé2021-01-141-2/+2
* target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6Philippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5Philippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3Philippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2Philippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1Philippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit()Philippe Mathieu-Daudé2021-01-141-1/+3
* target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1Philippe Mathieu-Daudé2021-01-141-4/+4
* target/mips/mips-defs: Reorder CPU_MIPS5 definitionPhilippe Mathieu-Daudé2021-01-141-2/+1Star
* target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS commentPhilippe Mathieu-Daudé2021-01-141-6/+0Star
* target/mips: Add comments for vendor-specific ASEsJiaxun Yang2020-06-151-0/+4
* target/mips: Legalize Loongson insn flagsJiaxun Yang2020-06-151-2/+2
* target/mips: Add Loongson-3 CPU definitionHuacai Chen2020-06-091-20/+25
* target/mips: Clean up mips-defs.hAleksandar Markovic2019-10-011-26/+32
* tcg: Split out target/arch/cpu-param.hRichard Henderson2019-06-101-15/+0Star
* target/mips: Define a bit for MXU in insn_flagsCraig Janeczek2018-10-291-0/+1
* target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constantsFredrik Noring2018-10-241-0/+3
* target/mips: Improve DSP R2/R3-related namingStefan Markovic2018-10-181-2/+2
* target/mips: Add bit definitions for DSP R3 ASEStefan Markovic2018-10-181-0/+1
* target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags)Philippe Mathieu-Daudé2018-10-181-34/+44
* target/mips: Add preprocessor constants for nanoMIPSAleksandar Markovic2018-08-241-0/+4
* linux-user: Tidy and enforce reserved_va initializationRichard Henderson2017-10-161-1/+5
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+91
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 03:32:19 +0100