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* target/mips: Move TCG source files under tcg/ sub directoryPhilippe Mathieu-Daudé2021-05-0225-43/+41Star
* target/mips: Move CP0 helpers to sysemu/cp0.cPhilippe Mathieu-Daudé2021-05-024-107/+129
* target/mips: Move exception management code to exception.cPhilippe Mathieu-Daudé2021-05-026-163/+182
* target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.cPhilippe Mathieu-Daudé2021-05-025-350/+340Star
* target/mips: Move helper_cache() to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé2021-05-025-37/+47
* target/mips: Move Special opcodes to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé2021-05-027-122/+151
* target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scopePhilippe Mathieu-Daudé2021-05-022-12/+7Star
* target/mips: Move tlb_helper.c to tcg/sysemu/Philippe Mathieu-Daudé2021-05-025-9/+6Star
* target/mips: Restrict mmu_init() to TCGPhilippe Mathieu-Daudé2021-05-023-4/+3Star
* target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolderPhilippe Mathieu-Daudé2021-05-027-167/+179
* target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCGPhilippe Mathieu-Daudé2021-05-022-4/+9
* target/mips: Move physical addressing code to sysemu/physaddr.cPhilippe Mathieu-Daudé2021-05-024-255/+282
* target/mips: Move sysemu specific files under sysemu/ subfolderPhilippe Mathieu-Daudé2021-05-025-6/+11
* target/mips: Move cpu_signal_handler definition aroundPhilippe Mathieu-Daudé2021-05-021-5/+4Star
* target/mips: Add simple user-mode mips_cpu_tlb_fill()Philippe Mathieu-Daudé2021-05-022-10/+36
* target/mips: Add simple user-mode mips_cpu_do_interrupt()Philippe Mathieu-Daudé2021-05-025-5/+39
* target/mips: Introduce tcg-internal.h for TCG specific declarationsPhilippe Mathieu-Daudé2021-05-022-4/+23
* target/mips: Extract load/store helpers to ldst_helper.cPhilippe Mathieu-Daudé2021-05-023-259/+289
* target/mips: Merge do_translate_address into cpu_mips_translate_addressPhilippe Mathieu-Daudé2021-05-023-24/+9Star
* target/mips: Declare mips_env_set_pc() inlined in "internal.h"Philippe Mathieu-Daudé2021-05-023-20/+14Star
* target/mips: Turn printfpr() macro into a proper functionPhilippe Mathieu-Daudé2021-05-021-27/+23Star
* target/mips: Restrict mips_cpu_dump_state() to cpu.cPhilippe Mathieu-Daudé2021-05-023-78/+77Star
* target/mips: Optimize CPU/FPU regnames[] arraysPhilippe Mathieu-Daudé2021-05-023-4/+4
* target/mips: Make CPU/FPU regnames[] arrays globalPhilippe Mathieu-Daudé2021-05-024-14/+17
* target/mips: Move msa_reset() to new source filePhilippe Mathieu-Daudé2021-05-023-36/+61
* target/mips: Move IEEE rounding mode array to new source filePhilippe Mathieu-Daudé2021-05-023-8/+19
* target/mips: Simplify meson TCG rulesPhilippe Mathieu-Daudé2021-05-021-3/+2Star
* target/mips: Make check_cp0_enabled() return a booleanPhilippe Mathieu-Daudé2021-05-022-2/+9
* target/mips: Migrate missing CPU fieldsPhilippe Mathieu-Daudé2021-05-021-6/+15
* target/mips: Remove spurious LOG_UNIMP of MTHC0 opcodePhilippe Mathieu-Daudé2021-05-021-0/+1
* target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodesPhilippe Mathieu-Daudé2021-05-021-0/+2
* target/mips: Fix CACHEE opcode (CACHE using EVA addressing)Philippe Mathieu-Daudé2021-05-021-1/+3
* target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)Philippe Mathieu-Daudé2021-04-201-5/+4Star
* target/mips: Fix TCG temporary leak in gen_cache_operation()Philippe Mathieu-Daudé2021-04-131-0/+2
* target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAXPeter Maydell2021-03-221-4/+4
* target/mips/tx79: Salvage instructions description commentPhilippe Mathieu-Daudé2021-03-132-160/+188
* target/mips: Remove 'C790 Multimedia Instructions' dead codePhilippe Mathieu-Daudé2021-03-131-371/+0Star
* target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetreePhilippe Mathieu-Daudé2021-03-133-80/+48Star
* target/mips/tx79: Move PCPYH opcode to decodetreePhilippe Mathieu-Daudé2021-03-133-39/+27Star
* target/mips/translate: Simplify PCPYH using deposit_i64()Philippe Mathieu-Daudé2021-03-131-30/+4Star
* target/mips/translate: Make gen_rdhwr() publicPhilippe Mathieu-Daudé2021-03-132-1/+3
* target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetreePhilippe Mathieu-Daudé2021-03-133-25/+17Star
* target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetreePhilippe Mathieu-Daudé2021-03-136-12/+94
* target/mips: Use gen_load_gpr[_hi]() when possiblePhilippe Mathieu-Daudé2021-03-131-23/+6Star
* target/mips: Extract MXU code to new mxu_translate.c filePhilippe Mathieu-Daudé2021-03-133-1605/+1613
* target/mips: Introduce mxu_translate_init() helperPhilippe Mathieu-Daudé2021-03-132-12/+17
* target/mips: Simplify decode_opc_mxu() ifdef'ryPhilippe Mathieu-Daudé2021-03-132-4/+5
* target/mips: Convert decode_ase_mxu() to decodetree prototypePhilippe Mathieu-Daudé2021-03-131-3/+5
* target/mips: Rename decode_opc_mxu() as decode_ase_mxu()Philippe Mathieu-Daudé2021-03-131-2/+2
* target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()Philippe Mathieu-Daudé2021-03-131-14/+5Star
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