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Experimental fork of QEMU with video encoding patches
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mips
Commit message (
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Author
Age
Files
Lines
*
target/mips: Fix 'Uncoditional' typo
Philippe Mathieu-Daudé
2021-06-05
1
-3
/
+3
*
docs: fix references to docs/devel/tracing.rst
Stefano Garzarella
2021-06-02
1
-1
/
+1
*
hw/core: Constify TCGCPUOps
Richard Henderson
2021-05-27
1
-1
/
+1
*
target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed
Richard Henderson
2021-05-27
2
-1
/
+5
*
cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Move CPUClass::vmsd to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
cpu: Introduce SysemuCPUOps structure
Philippe Mathieu-Daudé
2021-05-27
1
-0
/
+8
*
cpu: Rename CPUClass vmsd -> legacy_vmsd
Philippe Mathieu-Daudé
2021-05-27
1
-1
/
+1
*
target/mips: Set set_default_nan_mode with set_snan_bit_is_one
Richard Henderson
2021-05-16
1
-2
/
+8
*
target/mips: Move TCG source files under tcg/ sub directory
Philippe Mathieu-Daudé
2021-05-02
25
-43
/
+41
*
target/mips: Move CP0 helpers to sysemu/cp0.c
Philippe Mathieu-Daudé
2021-05-02
4
-107
/
+129
*
target/mips: Move exception management code to exception.c
Philippe Mathieu-Daudé
2021-05-02
6
-163
/
+182
*
target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c
Philippe Mathieu-Daudé
2021-05-02
5
-350
/
+340
*
target/mips: Move helper_cache() to tcg/sysemu/special_helper.c
Philippe Mathieu-Daudé
2021-05-02
5
-37
/
+47
*
target/mips: Move Special opcodes to tcg/sysemu/special_helper.c
Philippe Mathieu-Daudé
2021-05-02
7
-122
/
+151
*
target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope
Philippe Mathieu-Daudé
2021-05-02
2
-12
/
+7
*
target/mips: Move tlb_helper.c to tcg/sysemu/
Philippe Mathieu-Daudé
2021-05-02
5
-9
/
+6
*
target/mips: Restrict mmu_init() to TCG
Philippe Mathieu-Daudé
2021-05-02
3
-4
/
+3
*
target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder
Philippe Mathieu-Daudé
2021-05-02
7
-167
/
+179
*
target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG
Philippe Mathieu-Daudé
2021-05-02
2
-4
/
+9
*
target/mips: Move physical addressing code to sysemu/physaddr.c
Philippe Mathieu-Daudé
2021-05-02
4
-255
/
+282
*
target/mips: Move sysemu specific files under sysemu/ subfolder
Philippe Mathieu-Daudé
2021-05-02
5
-6
/
+11
*
target/mips: Move cpu_signal_handler definition around
Philippe Mathieu-Daudé
2021-05-02
1
-5
/
+4
*
target/mips: Add simple user-mode mips_cpu_tlb_fill()
Philippe Mathieu-Daudé
2021-05-02
2
-10
/
+36
*
target/mips: Add simple user-mode mips_cpu_do_interrupt()
Philippe Mathieu-Daudé
2021-05-02
5
-5
/
+39
*
target/mips: Introduce tcg-internal.h for TCG specific declarations
Philippe Mathieu-Daudé
2021-05-02
2
-4
/
+23
*
target/mips: Extract load/store helpers to ldst_helper.c
Philippe Mathieu-Daudé
2021-05-02
3
-259
/
+289
*
target/mips: Merge do_translate_address into cpu_mips_translate_address
Philippe Mathieu-Daudé
2021-05-02
3
-24
/
+9
*
target/mips: Declare mips_env_set_pc() inlined in "internal.h"
Philippe Mathieu-Daudé
2021-05-02
3
-20
/
+14
*
target/mips: Turn printfpr() macro into a proper function
Philippe Mathieu-Daudé
2021-05-02
1
-27
/
+23
*
target/mips: Restrict mips_cpu_dump_state() to cpu.c
Philippe Mathieu-Daudé
2021-05-02
3
-78
/
+77
*
target/mips: Optimize CPU/FPU regnames[] arrays
Philippe Mathieu-Daudé
2021-05-02
3
-4
/
+4
*
target/mips: Make CPU/FPU regnames[] arrays global
Philippe Mathieu-Daudé
2021-05-02
4
-14
/
+17
*
target/mips: Move msa_reset() to new source file
Philippe Mathieu-Daudé
2021-05-02
3
-36
/
+61
*
target/mips: Move IEEE rounding mode array to new source file
Philippe Mathieu-Daudé
2021-05-02
3
-8
/
+19
*
target/mips: Simplify meson TCG rules
Philippe Mathieu-Daudé
2021-05-02
1
-3
/
+2
*
target/mips: Make check_cp0_enabled() return a boolean
Philippe Mathieu-Daudé
2021-05-02
2
-2
/
+9
*
target/mips: Migrate missing CPU fields
Philippe Mathieu-Daudé
2021-05-02
1
-6
/
+15
*
target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode
Philippe Mathieu-Daudé
2021-05-02
1
-0
/
+1
*
target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes
Philippe Mathieu-Daudé
2021-05-02
1
-0
/
+2
*
target/mips: Fix CACHEE opcode (CACHE using EVA addressing)
Philippe Mathieu-Daudé
2021-05-02
1
-1
/
+3
*
target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)
Philippe Mathieu-Daudé
2021-04-20
1
-5
/
+4
*
target/mips: Fix TCG temporary leak in gen_cache_operation()
Philippe Mathieu-Daudé
2021-04-13
1
-0
/
+2
*
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
Peter Maydell
2021-03-22
1
-4
/
+4
*
target/mips/tx79: Salvage instructions description comment
Philippe Mathieu-Daudé
2021-03-13
2
-160
/
+188
*
target/mips: Remove 'C790 Multimedia Instructions' dead code
Philippe Mathieu-Daudé
2021-03-13
1
-371
/
+0
*
target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree
Philippe Mathieu-Daudé
2021-03-13
3
-80
/
+48
*
target/mips/tx79: Move PCPYH opcode to decodetree
Philippe Mathieu-Daudé
2021-03-13
3
-39
/
+27
*
target/mips/translate: Simplify PCPYH using deposit_i64()
Philippe Mathieu-Daudé
2021-03-13
1
-30
/
+4
*
target/mips/translate: Make gen_rdhwr() public
Philippe Mathieu-Daudé
2021-03-13
2
-1
/
+3
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