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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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openrisc
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interrupt.c
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Author
Age
Files
Lines
*
Include qemu-common.h exactly where needed
Markus Armbruster
2019-06-12
1
-1
/
+0
*
target/openrisc: Fix LGPL information in the file headers
Thomas Huth
2019-05-08
1
-1
/
+1
*
target/openrisc: Fix delay slot exception flag to match spec
Stafford Horne
2018-07-03
1
-7
/
+12
*
target/openrisc: Fix cpu_mmu_index
Richard Henderson
2018-07-02
1
-4
/
+0
*
target/openrisc: Remove indirect function calls for mmu
Richard Henderson
2018-07-02
1
-2
/
+0
*
target/openrisc: Merge tlb allocation into CPUOpenRISCState
Richard Henderson
2018-07-02
1
-2
/
+2
*
target/openrisc: Log interrupts
Richard Henderson
2018-07-02
1
-5
/
+25
*
target/openrisc: Support non-busy idle state using PMR SPR
Stafford Horne
2017-05-04
1
-0
/
+2
*
target/openrisc: Implement EPH bit
Tim 'mithro' Ansell
2017-04-21
1
-0
/
+3
*
target/openrisc: Implement EVBAR register
Tim 'mithro' Ansell
2017-04-21
1
-1
/
+5
*
target/openrisc: Tidy handling of delayed branches
Richard Henderson
2017-02-13
1
-2
/
+2
*
target/openrisc: Keep SR_F in a separate variable
Richard Henderson
2017-02-13
1
-1
/
+1
*
target/openrisc: Implement lwa, swa
Richard Henderson
2017-02-13
1
-0
/
+1
*
target/openrisc: Fix exception handling status registers
Stafford Horne
2017-02-13
1
-0
/
+7
*
cputlb: drop flush_global flag from tlb_flush
Alex Bennée
2017-01-13
1
-1
/
+1
*
Move target-* CPU file into a target/ folder
Thomas Huth
2016-12-20
1
-0
/
+87