| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | target/openrisc: Support non-busy idle state using PMR SPR | Stafford Horne | 2017-05-04 | 1 | -0/+13 |
| * | target/openrisc: implement shadow registers | Stafford Horne | 2017-05-04 | 1 | -0/+9 |
| * | target/openrisc: add numcores and coreid support | Stafford Horne | 2017-05-04 | 1 | -0/+6 |
| * | target/openrisc: Implement EVBAR register | Tim 'mithro' Ansell | 2017-04-21 | 1 | -0/+7 |
| * | target/openrisc: Tidy handling of delayed branches | Richard Henderson | 2017-02-13 | 1 | -1/+1 |
| * | target/openrisc: Tidy ppc/npc implementation | Richard Henderson | 2017-02-13 | 1 | -28/+16 |
| * | target/openrisc: Represent MACHI:MACLO as a single unit | Richard Henderson | 2017-02-13 | 1 | -0/+13 |
| * | target/openrisc: Keep SR_F in a separate variable | Richard Henderson | 2017-02-13 | 1 | -3/+2 |
| * | cputlb: drop flush_global flag from tlb_flush | Alex Bennée | 2017-01-13 | 1 | -1/+1 |
| * | Move target-* CPU file into a target/ folder | Thomas Huth | 2016-12-20 | 1 | -0/+288 |
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index : bwlp/qemu.git | |
| Experimental fork of QEMU with video encoding patches | OpenSLX |
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