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* target-openrisc: Write back result before FPE exceptionRichard Henderson2018-05-143-252/+126Star
* target/openrisc: convert to TranslatorOpsEmilio G. Cota2018-05-091-84/+79Star
* target/openrisc: convert to DisasContextBaseEmilio G. Cota2018-05-091-47/+46Star
* icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk2018-04-111-4/+4
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-2/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-212-1/+1
* qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé2018-02-051-3/+2Star
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-253-8/+8
* target/*helper: don't check retaddr before calling cpu_restore_stateAlex Bennée2017-12-281-5/+1Star
* misc: remove duplicated includesPhilippe Mathieu-Daudé2017-12-181-1/+0Star
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2017-10-302-46/+26Star
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| * openrisc: cleanup cpu type name compositionIgor Mammedov2017-10-272-46/+26Star
* | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-1/+1
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| * disas: Remove unused flags argumentsRichard Henderson2017-10-251-1/+1
* | tcg: Initialize cpu_env genericallyRichard Henderson2017-10-241-3/+0Star
* | tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota2017-10-241-1/+1
* | tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota2017-10-241-3/+3
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-6/+1Star
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* openrisc/cputimer: Perparation for MulticoreStafford Horne2017-10-204-5/+5
* target/openrisc: Make coreid and numcores variableStafford Horne2017-10-201-2/+3
* qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé2017-10-101-4/+0Star
* target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova2017-09-061-0/+6
* openrisc: replace cpu_openrisc_init() with cpu_generic_init()Igor Mammedov2017-09-012-8/+1Star
* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-2/+2
* target/openrisc: Support non-busy idle state using PMR SPRStafford Horne2017-05-045-1/+28
* target/openrisc: Remove duplicate features propertyStafford Horne2017-05-042-28/+5Star
* target/openrisc: Implement full vmstate serializationStafford Horne2017-05-041-2/+71
* target/openrisc: implement shadow registersStafford Horne2017-05-046-10/+33
* target/openrisc: add numcores and coreid supportStafford Horne2017-05-041-0/+6
* target/openrisc: Fixes for memory debuggingStafford Horne2017-05-041-4/+20
* target/openrisc: Implement EPH bitTim 'mithro' Ansell2017-04-211-0/+3
* target/openrisc: Implement EVBAR registerTim 'mithro' Ansell2017-04-214-1/+21
* target/openrisc: Optimize for r0 being zeroRichard Henderson2017-02-133-23/+66
* target/openrisc: Tidy handling of delayed branchesRichard Henderson2017-02-135-35/+25Star
* target/openrisc: Tidy ppc/npc implementationRichard Henderson2017-02-136-55/+39Star
* target/openrisc: Optimize l.jal to nextRichard Henderson2017-02-131-1/+5
* target/openrisc: Fix maddRichard Henderson2017-02-134-61/+30Star
* target/openrisc: Implement muld, muldu, macu, msbuRichard Henderson2017-02-131-0/+108
* target/openrisc: Represent MACHI:MACLO as a single unitRichard Henderson2017-02-134-61/+80
* target/openrisc: Implement msyncRichard Henderson2017-02-131-0/+1
* target/openrisc: Enable trap, csync, msync, psync for user modeRichard Henderson2017-02-131-32/+0Star
* target/openrisc: Set flags on helpersRichard Henderson2017-02-131-12/+12
* target/openrisc: Use movcond where appropriateRichard Henderson2017-02-131-14/+14
* target/openrisc: Keep SR_CY and SR_OV in a separate variablesRichard Henderson2017-02-134-89/+78Star
* target/openrisc: Keep SR_F in a separate variableRichard Henderson2017-02-137-74/+96
* target/openrisc: Invert the decoding in dec_calcRichard Henderson2017-02-131-207/+95Star
* target/openrisc: Put SR[OVE] in TB flagsRichard Henderson2017-02-133-12/+18
* target/openrisc: Streamline arithmetic and OVERichard Henderson2017-02-135-314/+191Star
* target/openrisc: Rationalize immediate extractionRichard Henderson2017-02-131-58/+40Star
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