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path: root/target/ppc/cpu_init.c
Commit message (Expand)AuthorAgeFilesLines
* target/ppc: add PPC_INTERRUPT_EBB and EBB exceptionsDaniel Henrique Barboza2022-03-021-0/+4
* target/ppc: make power8-pmu.c CONFIG_TCG onlyDaniel Henrique Barboza2022-03-021-9/+7Star
* target/ppc: Move common SPR functions out of cpu_initFabiano Rosas2022-02-181-400/+0Star
* target/ppc: cpu_init: Move check_pow and QOM macros to a headerFabiano Rosas2022-02-181-37/+0Star
* target/ppc: cpu_init: Move SPR registration macros to a headerFabiano Rosas2022-02-181-56/+9Star
* target/ppc: cpu_init: Expose some SPR registration helpersFabiano Rosas2022-02-181-7/+7
* target/ppc: Rename spr_tcg.h to spr_common.hFabiano Rosas2022-02-181-1/+1
* target/ppc: cpu_init: Remove register_usprg3_sprsFabiano Rosas2022-02-181-10/+11
* target/ppc: cpu_init: Rename register_ne_601_sprsFabiano Rosas2022-02-181-21/+20Star
* target/ppc: cpu_init: Reuse init_proc_745 for the 755Fabiano Rosas2022-02-181-17/+1Star
* target/ppc: cpu_init: Reuse init_proc_604 for the 604eFabiano Rosas2022-02-181-11/+1Star
* target/ppc: cpu_init: Reuse init_proc_603 for the e300Fabiano Rosas2022-02-181-58/+46Star
* target/ppc: cpu_init: Move 604e SPR registration into a functionFabiano Rosas2022-02-181-19/+24
* target/ppc: cpu_init: Move e300 SPR registration into a functionFabiano Rosas2022-02-181-29/+35
* target/ppc: cpu_init: Move 755 L2 cache SPRs into a functionFabiano Rosas2022-02-181-9/+15
* target/ppc: cpu_init: Deduplicate 7xx SPR registrationFabiano Rosas2022-02-181-57/+11Star
* target/ppc: cpu_init: Deduplicate 745/755 SPR registrationFabiano Rosas2022-02-181-31/+19Star
* target/ppc: cpu_init: Deduplicate 604 SPR registrationFabiano Rosas2022-02-181-10/+7Star
* target/ppc: cpu_init: Deduplicate 603 SPR registrationFabiano Rosas2022-02-181-19/+9Star
* target/ppc: cpu_init: Deduplicate 440 SPR registrationFabiano Rosas2022-02-181-74/+26Star
* target/ppc: cpu_init: Decouple 74xx SPR registration from 7xxFabiano Rosas2022-02-181-16/+91
* target/ppc: cpu_init: Decouple G2 SPR registration from 755Fabiano Rosas2022-02-181-5/+20
* target/ppc: cpu_init: Move G2 SPRs into register_G2_sprsFabiano Rosas2022-02-181-19/+22
* target/ppc: cpu_init: Move 405 SPRs into register_405_sprsFabiano Rosas2022-02-181-11/+13
* target/ppc: cpu_init: Avoid nested SPR register functionsFabiano Rosas2022-02-181-3/+3
* target/ppc: cpu_init: Move Timebase registration into the common functionFabiano Rosas2022-02-181-80/+18Star
* target/ppc: cpu_init: Group registration of generic SPRsFabiano Rosas2022-02-181-26/+32
* target/ppc: cpu_init: Remove G2LE init codeFabiano Rosas2022-02-181-41/+1Star
* target/ppc: cpu_init: Remove not implemented commentsFabiano Rosas2022-02-181-329/+253Star
* target/ppc: Merge 7x5 and 7x0 exception model IDsFabiano Rosas2022-02-091-8/+8
* target/ppc: Merge exception model IDs for 6xx CPUsFabiano Rosas2022-02-091-9/+9
* target/ppc: Remove PowerPC 601 CPUsCédric Le Goater2022-02-091-213/+1Star
* target/ppc: Remove 440x4 CPUFabiano Rosas2022-02-091-83/+0Star
* target/ppc: Remove support for the PowerPC 602 CPUCédric Le Goater2022-01-281-147/+0Star
* target/ppc: 405: Add missing MSR_ME bitFabiano Rosas2022-01-281-0/+1
* target/ppc: 405: Rename MSR_POW to MSR_WEFabiano Rosas2022-01-281-1/+1
* target/ppc: Add extra float instructions to POWER5P processorsCédric Le Goater2022-01-121-0/+1
* target/ppc: Add popcntb instruction to POWER5+ processorsCédric Le Goater2022-01-121-0/+1
* target/ppc: Cache per-pmc insn and cycle count settingsRichard Henderson2022-01-041-0/+1
* ppc/ppc405: Dump specific registersCédric Le Goater2022-01-041-6/+21
* ppc/ppc405: Introduce a store helper for SPR_40x_PIDCédric Le Goater2022-01-041-1/+1
* ppc/ppc405: Restore TCR and STR write handlersCédric Le Goater2022-01-041-2/+2
* target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) eventDaniel Henrique Barboza2021-12-171-1/+1
* target/ppc: PMU: update counters on MMCR1 writeDaniel Henrique Barboza2021-12-171-1/+1
* target/ppc: PMU: update counters on PMCs r/wDaniel Henrique Barboza2021-12-171-6/+6
* target/ppc: PMU basic cycle count for pseries TCGDaniel Henrique Barboza2021-12-171-3/+3
* target/ppc: introduce PMUEventType and PMU overflow timersDaniel Henrique Barboza2021-12-171-0/+24
* target/ppc: Fix e6500 bootFabiano Rosas2021-12-171-0/+6
* target/ppc: remove 401/403 CPUsCédric Le Goater2021-12-171-512/+0Star
* target/ppc: Set 601v exception model idFabiano Rosas2021-12-171-0/+1
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