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path: root/target/ppc/insn32.decode
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* PPC64/TCG: Implement 'rfebb' instructionDaniel Henrique Barboza2021-12-171-0/+5
* target/ppc: move xscvqpdp to decodetreeMatheus Ferst2021-12-171-0/+4
* target/ppc: Move xs{max,min}[cj]dp to decodetreeVictor Colombo2021-12-171-3/+14
* target/ppc: Implement Vector Mask Move insnsMatheus Ferst2021-12-171-0/+11
* target/ppc: Implement Vector Extract MaskMatheus Ferst2021-12-171-0/+6
* target/ppc: Implement Vector Expand MaskMatheus Ferst2021-12-171-0/+11
* target/ppc: Implement lxvkq instructionMatheus Ferst2021-11-091-0/+7
* target/ppc: moved XXSPLTIB to using decodetreeBruno Larsen (billionai)2021-11-091-0/+5
* target/ppc: moved XXSPLTW to using decodetreeBruno Larsen (billionai)2021-11-091-0/+9
* target/ppc: added the instructions LXVPX and STXVPXLucas Mateus Castro (alqotel)2021-11-091-0/+3
* target/ppc: added the instructions LXVP and STXVPLucas Mateus Castro (alqotel)2021-11-091-0/+5
* target/ppc: moved stxvx and lxvx from legacy to decodtreeLucas Mateus Castro (alqotel)2021-11-091-0/+5
* target/ppc: moved stxv and lxv from legacy to decodtreeLucas Mateus Castro (alqotel)2021-11-091-0/+8
* target/ppc: Implement Vector Extract Double to VSR using GPR index insnsMatheus Ferst2021-11-091-0/+12
* target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetreeMatheus Ferst2021-11-091-0/+5
* target/ppc: Implement Vector Insert from VSR using GPR index insnsMatheus Ferst2021-11-091-0/+7
* target/ppc: Implement Vector Insert Word from GPR using Immediate insnsMatheus Ferst2021-11-091-0/+6
* target/ppc: Implement Vector Insert from GPR using GPR index insnsMatheus Ferst2021-11-091-0/+9
* target/ppc: Implement vsldbi/vsrdbi instructionsMatheus Ferst2021-11-091-0/+8
* target/ppc: Implement vpdepd/vpextd instructionMatheus Ferst2021-11-091-0/+2
* target/ppc: Implement vclzdm/vctzdm instructionsMatheus Ferst2021-11-091-0/+2
* target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetreeLuis Pires2021-11-091-0/+28
* target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetreeLuis Pires2021-11-091-0/+23
* target/ppc: Move dqua[q], drrnd[q] to decodetreeLuis Pires2021-11-091-2/+16
* target/ppc: Move dquai[q], drint{x,n}[q] to decodetreeLuis Pires2021-11-091-0/+23
* target/ppc: Move dcmp{u,o}[q],dts{tex,tsf,tsfi}[q] to decodetreeLuis Pires2021-11-091-0/+29
* target/ppc: Move d{add,sub,mul,div,iex}[q] to decodetreeLuis Pires2021-11-091-2/+29
* target/ppc: Move dtstdc[q]/dtstdg[q] to decodetreeLuis Pires2021-11-091-0/+14
* target/ppc: Implement DCTFIXQQLuis Pires2021-11-091-0/+5
* target/ppc: Implement DCFFIXQQLuis Pires2021-11-091-0/+8
* target/ppc: Implement pextd instructionMatheus Ferst2021-11-091-0/+1
* target/ppc: Implement pdepd instructionMatheus Ferst2021-11-091-0/+1
* target/ppc: Implement cnttzdmLuis Pires2021-11-091-0/+1
* target/ppc: Implement cntlzdmLuis Pires2021-11-091-0/+1
* target/ppc: Move LQ and STQ to decodetreeMatheus Ferst2021-11-091-0/+11
* target/ppc: Move load and store floating point instructions to decodetreeFernando Eckhardt Valle2021-11-091-0/+24
* target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetreeMatheus Ferst2021-06-031-0/+14
* target/ppc: Move addpcis to decodetreeMatheus Ferst2021-06-031-0/+6
* target/ppc: Implement vcfuged instructionMatheus Ferst2021-06-031-0/+7
* target/ppc: Implement cfuged instructionMatheus Ferst2021-06-031-0/+4
* target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructionsMatheus Ferst2021-06-031-0/+10
* target/ppc: Move D/DS/X-form integer stores to decodetreeRichard Henderson2021-06-031-0/+22
* target/ppc: Move D/DS/X-form integer loads to decodetreeRichard Henderson2021-06-031-0/+37
* target/ppc: Move ADDI, ADDIS to decodetree, implement PADDIRichard Henderson2021-06-031-0/+8
* target/ppc: Add infrastructure for prefixed insnsRichard Henderson2021-06-031-0/+18