| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | PPC64/TCG: Implement 'rfebb' instruction | Daniel Henrique Barboza | 2021-12-17 | 1 | -0/+33 |
| * | target/ppc: move xscvqpdp to decodetree | Matheus Ferst | 2021-12-17 | 2 | -12/+13 |
| * | target/ppc: fix xscvqpdp register access | Matheus Ferst | 2021-12-17 | 1 | -2/+3 |
| * | target/ppc: Move xs{max,min}[cj]dp to decodetree | Victor Colombo | 2021-12-17 | 2 | -8/+26 |
| * | target/ppc: Fix xs{max, min}[cj]dp to use VSX registers | Victor Colombo | 2021-12-17 | 1 | -4/+4 |
| * | target/ppc: Add helper for frsqrtes | Richard Henderson | 2021-12-17 | 1 | -2/+1 |
| * | target/ppc: Add helper for fmuls | Richard Henderson | 2021-12-17 | 1 | -7/+4 |
| * | target/ppc: Add helpers for fadds, fsubs, fdivs | Richard Henderson | 2021-12-17 | 1 | -7/+4 |
| * | target/ppc: Add helper for fsqrts | Richard Henderson | 2021-12-17 | 1 | -2/+1 |
| * | target/ppc: Add helpers for fmadds et al | Richard Henderson | 2021-12-17 | 1 | -8/+5 |
| * | target/ppc: Move float_check_status from FPU_FCTI to translate | Richard Henderson | 2021-12-17 | 1 | -1/+2 |
| * | target/ppc: Implement Vector Mask Move insns | Matheus Ferst | 2021-12-17 | 1 | -0/+115 |
| * | target/ppc: Implement Vector Extract Mask | Matheus Ferst | 2021-12-17 | 1 | -0/+82 |
| * | target/ppc: Implement Vector Expand Mask | Matheus Ferst | 2021-12-17 | 1 | -0/+34 |
| * | target/ppc: Fixed call to deferred exception | Lucas Mateus Castro (alqotel) | 2021-12-17 | 1 | -6/+3 |
| * | target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x] | Matheus Ferst | 2021-11-10 | 1 | -1/+1 |
| * | target/ppc: cntlzdm/cnttzdm implementation without brcond | Matheus Ferst | 2021-11-09 | 1 | -15/+16 |
| * | target/ppc: Implement lxvkq instruction | Matheus Ferst | 2021-11-09 | 1 | -0/+43 |
| * | target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions | Matheus Ferst | 2021-11-09 | 1 | -0/+55 |
| * | target/ppc: implemented XXSPLTIDP instruction | Bruno Larsen (billionai) | 2021-11-09 | 1 | -0/+10 |
| * | target/ppc: Implemented XXSPLTIW using decodetree | Bruno Larsen (billionai) | 2021-11-09 | 1 | -0/+10 |
| * | target/ppc: implemented XXSPLTI32DX | Bruno Larsen (billionai) | 2021-11-09 | 1 | -0/+17 |
| * | target/ppc: moved XXSPLTIB to using decodetree | Bruno Larsen (billionai) | 2021-11-09 | 2 | -15/+6 |
| * | target/ppc: moved XXSPLTW to using decodetree | Bruno Larsen (billionai) | 2021-11-09 | 2 | -12/+6 |
| * | target/ppc: added the instructions PLXVP and PSTXVP | Lucas Mateus Castro (alqotel) | 2021-11-09 | 1 | -0/+2 |
| * | target/ppc: added the instructions PLXV and PSTXV | Lucas Mateus Castro (alqotel) | 2021-11-09 | 1 | -0/+16 |
| * | target/ppc: added the instructions LXVPX and STXVPX | Lucas Mateus Castro (alqotel) | 2021-11-09 | 1 | -6/+12 |
| * | target/ppc: added the instructions LXVP and STXVP | Lucas Mateus Castro (alqotel) | 2021-11-09 | 1 | -12/+43 |
| * | target/ppc: moved stxvx and lxvx from legacy to decodtree | Lucas Mateus Castro (alqotel) | 2021-11-09 | 2 | -108/+15 |
| * | target/ppc: moved stxv and lxv from legacy to decodtree | Lucas Mateus Castro (alqotel) | 2021-11-09 | 1 | -2/+49 |
| * | target/ppc: receive high/low as argument in get/set_cpu_vsr | Matheus Ferst | 2021-11-09 | 1 | -171/+146 |
| * | target/ppc: Implement Vector Extract Double to VSR using GPR index insns | Matheus Ferst | 2021-11-09 | 1 | -0/+37 |
| * | target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree | Matheus Ferst | 2021-11-09 | 2 | -17/+25 |
| * | target/ppc: Implement Vector Insert from VSR using GPR index insns | Matheus Ferst | 2021-11-09 | 1 | -0/+32 |
| * | target/ppc: Implement Vector Insert Word from GPR using Immediate insns | Matheus Ferst | 2021-11-09 | 1 | -0/+37 |
| * | target/ppc: Implement Vector Insert from GPR using GPR index insns | Matheus Ferst | 2021-11-09 | 1 | -0/+50 |
| * | target/ppc: Implement vsldbi/vsrdbi instructions | Matheus Ferst | 2021-11-09 | 1 | -0/+66 |
| * | target/ppc: Implement vpdepd/vpextd instruction | Matheus Ferst | 2021-11-09 | 1 | -0/+32 |
| * | target/ppc: Implement vclzdm/vctzdm instructions | Matheus Ferst | 2021-11-09 | 2 | -3/+33 |
| * | target/ppc: Move vcfuged to vmx-impl.c.inc | Matheus Ferst | 2021-11-09 | 3 | -49/+17 |
| * | target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -69/+24 |
| * | target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -50/+26 |
| * | target/ppc: Move dqua[q], drrnd[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -52/+23 |
| * | target/ppc: Move dquai[q], drint{x,n}[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -46/+23 |
| * | target/ppc: Move dcmp{u,o}[q],dts{tex,tsf,tsfi}[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -71/+34 |
| * | target/ppc: Move d{add,sub,mul,div,iex}[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -48/+27 |
| * | target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree | Luis Pires | 2021-11-09 | 2 | -30/+15 |
| * | target/ppc: Do not update nip on DFP instructions | Luis Pires | 2021-11-09 | 1 | -8/+0 |
| * | target/ppc: Implement DCTFIXQQ | Luis Pires | 2021-11-09 | 1 | -0/+17 |
| * | target/ppc: Implement DCFFIXQQ | Luis Pires | 2021-11-09 | 1 | -0/+17 |
