Commit message (Expand) | Author | Age | Files | Lines | |
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* | target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instr... | Alexey Baturo | 2021-10-28 | 1 | -0/+2 |
* | target/riscv: Use {get,dest}_gpr for RVD | Richard Henderson | 2021-09-01 | 1 | -65/+60 |
* | target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr | Richard Henderson | 2021-09-01 | 1 | -16/+16 |
* | target/riscv: Consolidate RV32/64 32-bit instructions | Alistair Francis | 2021-05-11 | 1 | -3/+14 |
* | target/riscv: check before allocating TCG temps | LIU Zhiwei | 2020-08-22 | 1 | -4/+4 |
* | meson: rename included C source files to .c.inc | Paolo Bonzini | 2020-08-21 | 1 | -0/+441 |