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* s390x/tcg: add various alignment checksDavid Hildenbrand2018-02-261-8/+8
* s390x/tcg: wire up pci instructionsCornelia Huck2018-02-091-0/+13
* s390x/tcg: implement TEST PENDING INTERRUPTIONDavid Hildenbrand2018-02-091-0/+1
* s390x/tcg: implement extract-CPU-time facilityDavid Hildenbrand2017-12-141-0/+2
* s390x/tcg: Implement SIGNAL ADAPTER instructionDavid Hildenbrand2017-12-141-0/+1
* s390x/tcg: Implement STORE CHANNEL PATH STATUSDavid Hildenbrand2017-12-141-0/+1
* s390x/tcg: wire up SET CHANNEL MONITORDavid Hildenbrand2017-12-141-0/+1
* s390x/tcg: wire up SET ADDRESS LIMITDavid Hildenbrand2017-12-141-0/+1
* s390x/tcg: implement Interlocked-Access Facility 2David Hildenbrand2017-12-141-6/+6
* s390x/tcg: ASI/ASGI/ALSI/ALSGI are atomic with Interlocked-acccess facility 1David Hildenbrand2017-12-141-4/+4
* s390x/tcg: wire up STORE CHANNEL REPORT WORDDavid Hildenbrand2017-12-141-0/+1
* s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELDDavid Hildenbrand2017-12-141-0/+2
* s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand2017-10-201-1/+1
* s390x/tcg: add basic MSA featuresDavid Hildenbrand2017-10-061-0/+13
* s390x/tcg: implement spm (SET PROGRAM MASK)David Hildenbrand2017-10-061-0/+2
* target/s390x: Implement TRTRRichard Henderson2017-07-171-0/+2
* target/s390x: Implement SRSTURichard Henderson2017-07-171-0/+2
* target/s390x: Tidy SRSTRichard Henderson2017-07-171-1/+1
* target/s390x: Implement CONVERT UNICODE insnsRichard Henderson2017-07-171-0/+13
* target/s390x: Implement CSSTRichard Henderson2017-07-171-0/+2
* target/s390x: Implement idte instructionDavid Hildenbrand2017-06-231-0/+2
* target/s390x: Implement processor-assist insnRichard Henderson2017-06-231-0/+3
* target/s390x: Implement execution-hint insnsRichard Henderson2017-06-231-0/+9
* target/s390x: Implement load-and-zero-rightmost-byte insnsRichard Henderson2017-06-231-0/+5
* target/s390x: Implement load-on-condition-2 insnsRichard Henderson2017-06-231-0/+9
* target/s390x: implement mvcos instructionDavid Hildenbrand2017-06-231-0/+2
* s390x/cpumodel: wire up cpu type + id for TCGDavid Hildenbrand2017-06-131-1/+1
* target/s390x: implement STORE PAIR TO QUADWORDAurelien Jarno2017-06-071-0/+2
* target/s390x: implement LOAD PAIR FROM QUADWORDAurelien Jarno2017-06-071-0/+2
* target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWOAurelien Jarno2017-06-071-0/+9
* target/s390x: implement TEST DECIMALAurelien Jarno2017-06-071-0/+3
* target/s390x: implement UNPACK UNICODEAurelien Jarno2017-06-071-0/+2
* target/s390x: implement UNPACK ASCIIAurelien Jarno2017-06-071-0/+2
* target/s390x: implement PACK UNICODEAurelien Jarno2017-06-071-0/+2
* target/s390x: implement PACK ASCIIAurelien Jarno2017-06-071-0/+2
* target/s390x: implement MOVE LONG UNICODEAurelien Jarno2017-06-071-0/+2
* target/s390x: implement COMPARE LOGICAL LONG UNICODEAurelien Jarno2017-06-071-0/+2
* target/s390x: implement COMPARE LOGICAL LONGAurelien Jarno2017-06-071-0/+2
* target/s390x: implement MOVE ZONESAurelien Jarno2017-06-071-0/+2
* target/s390x: implement MOVE WITH OFFSETAurelien Jarno2017-06-071-0/+4
* target/s390x: implement MOVE NUMERICSAurelien Jarno2017-06-071-0/+2
* target/s390x: implement MOVE INVERSEAurelien Jarno2017-06-071-0/+2
* target/s390x: implement COMPARE AND SIGNALAurelien Jarno2017-06-071-0/+6
* target/s390x: implement PACKAurelien Jarno2017-06-061-0/+5
* target/s390x: implement TEST ADDRESSING MODEAurelien Jarno2017-06-061-0/+3
* target/s390x: implement TEST AND SETAurelien Jarno2017-06-061-0/+3
* target/s390x: Implement CSPGRichard Henderson2017-06-061-0/+1
* target/s390x: Use atomic operations for COMPARE SWAP PURGERichard Henderson2017-06-061-1/+1
* target/s390x: Fix EXECUTE with R1==0Richard Henderson2017-06-061-2/+2
* target/s390x: Add support for the TEST BLOCK instructionThomas Huth2017-06-061-0/+2
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