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* sh4: fix use_icount with linux-userLaurent Vivier2018-08-201-0/+1
* target/sh4: Fix translator.c assertion failure for gUSARichard Henderson2018-07-091-37/+44
* tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-4/+4
* fpu/softfloat: Specialize on snan_bit_is_oneRichard Henderson2018-05-181-1/+0Star
* target/sh4: convert to TranslatorOpsEmilio G. Cota2018-05-091-85/+86
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-2/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* qom: introduce object_class_get_list_sortedPaolo Bonzini2018-03-121-14/+1Star
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-213-2/+2
* qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé2018-02-051-2/+2
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-253-6/+6
* tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson2017-12-291-2/+2
* target/sh4: Convert to DisasContextBaseRichard Henderson2017-12-181-76/+78
* target/sh4: Do not singlestep after exceptionsRichard Henderson2017-12-181-16/+16
* target/sh4: Convert to DisasJumpTypeRichard Henderson2017-12-181-35/+30Star
* target/sh4: Use cmpxchg for movco when parallel_cpusRichard Henderson2017-12-183-23/+64
* target/sh4: fix TCG leak during gusa sequenceAlex Bennée2017-12-181-1/+1
* target/sh4: add missing tcg_temp_free() in _decode_opc()Philippe Mathieu-Daudé2017-12-181-0/+2
* Remove empty statementsLadi Prosek2017-12-181-1/+1
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2017-10-303-72/+46Star
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| * sh4: remove SuperHCPUClass::name fieldIgor Mammedov2017-10-272-9/+3Star
| * sh4: simplify superh_cpu_class_by_name()Igor Mammedov2017-10-271-22/+12Star
| * sh4: cleanup cpu type name compositionIgor Mammedov2017-10-273-41/+31Star
* | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-1/+1
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| * disas: Remove unused flags argumentsRichard Henderson2017-10-251-1/+1
* | tcg: Initialize cpu_env genericallyRichard Henderson2017-10-241-4/+0Star
* | tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota2017-10-241-1/+1
* | target/sh4: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota2017-10-241-1/+1
* | tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota2017-10-241-3/+3
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-242-11/+1Star
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* linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31Richard Henderson2017-10-161-1/+5
* tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota2017-10-101-2/+2
* qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé2017-10-101-3/+0Star
* sh4: replace cpu_sh4_init() with cpu_generic_init()Igor Mammedov2017-09-012-7/+1Star
* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-3/+2Star
* target/sh4: Use tcg_gen_lookup_and_goto_ptrRichard Henderson2017-07-181-10/+20
* target/sh4: Implement fsrraRichard Henderson2017-07-183-0/+19
* target/sh4: Add missing FPSCR.PR == 0 checksRichard Henderson2017-07-181-0/+2
* target/sh4: Implement fpchgRichard Henderson2017-07-181-0/+5
* target/sh4: Introduce CHECK_SH4ARichard Henderson2017-07-181-34/+30Star
* target/sh4: Introduce CHECK_FPSCR_PR_*Richard Henderson2017-07-181-26/+31
* target/sh4: Tidy misc illegal insn checksRichard Henderson2017-07-181-9/+13
* target/sh4: Unify code for CHECK_FPU_ENABLEDRichard Henderson2017-07-181-10/+14
* target/sh4: Unify code for CHECK_PRIVILEGEDRichard Henderson2017-07-181-10/+4Star
* target/sh4: Unify code for CHECK_NOT_DELAY_SLOTRichard Henderson2017-07-181-6/+5Star
* target/sh4: Simplify 64-bit fp reg-reg moveRichard Henderson2017-07-181-4/+4
* target/sh4: Load/store Dr as 64-bit quantitiesRichard Henderson2017-07-181-39/+36Star
* target/sh4: Merge DREG into fpr64 routinesRichard Henderson2017-07-181-11/+15
* target/sh4: Eliminate unused XREG macroRichard Henderson2017-07-181-1/+0Star
* target/sh4: Hoist fp register bank selectionRichard Henderson2017-07-181-3/+5
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