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path: root/target/sparc/cpu.h
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* gdbstub: extend GByteArray to read register helpersAlex Bennée2020-03-171-1/+1
* target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson2019-11-061-0/+33
* target/sparc: Switch to do_transaction_failed() hookPeter Maydell2019-09-171-3/+5
* target/sparc: sun4u Invert Endian TTE bitTony Nguyen2019-09-031-0/+2
* configure: Define target access alignment in configuretony.nguyen@bt.com2019-08-201-2/+0Star
* migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster2019-08-161-1/+1
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-1/+0Star
* cpu: Remove CPU_COMMONRichard Henderson2019-06-101-2/+0Star
* cpu: Introduce CPUNegativeOffsetStateRichard Henderson2019-06-101-0/+1
* cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson2019-06-101-1/+0Star
* target/sparc: Use env_cpu, env_archcpuRichard Henderson2019-06-101-5/+0Star
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-2/+0Star
* cpu: Define ArchCPURichard Henderson2019-06-101-0/+1
* cpu: Define CPUArchState with typedefRichard Henderson2019-06-101-2/+2
* tcg: Split out target/arch/cpu-param.hRichard Henderson2019-06-101-18/+2Star
* target/sparc: Convert to CPUClass::tlb_fillRichard Henderson2019-05-101-2/+3
* qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster2019-04-181-2/+1Star
* target: Clean up how the dump_mmu() printMarkus Armbruster2019-04-181-1/+1
* target: Simplify how the TARGET_cpu_list() printMarkus Armbruster2019-04-181-1/+1
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-4/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-2/+0Star
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-1/+1
* sparc: cleanup cpu type name compositionIgor Mammedov2017-10-271-0/+3
* qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-1/+1
* sparc: Fix typedef clashDr. David Alan Gilbert2017-09-141-2/+2
* sparc: replace cpu_sparc_init() with cpu_generic_init()Igor Mammedov2017-09-011-2/+1Star
* sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov2017-09-011-4/+4
* target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko2017-01-181-0/+3
* target-sparc: implement UA2005 TSB PointersArtyom Tarasenko2017-01-181-0/+2
* target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko2017-01-181-30/+18Star
* target-sparc: use direct address translation in hyperprivileged modeArtyom Tarasenko2017-01-181-4/+3Star
* target-sparc: implement UA2005 GL registerArtyom Tarasenko2017-01-181-0/+2
* target-sparc: implement UA2005 hypervisor trapsArtyom Tarasenko2017-01-181-0/+1
* target-sparc: hypervisor mode takes over nucleus modeArtyom Tarasenko2017-01-181-2/+2
* target-sparc: implement UA2005 scratchpad registersArtyom Tarasenko2017-01-181-0/+1
* target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor modeArtyom Tarasenko2017-01-181-1/+2
* target-sparc: add UltraSPARC T1 TLB #definesArtyom Tarasenko2017-01-181-0/+4
* target-sparc: add UA2005 TTE bit #definesArtyom Tarasenko2017-01-181-0/+17
* target-sparc: use explicit mmu register pointersArtyom Tarasenko2017-01-181-0/+4
* target-sparc: store cpu super- and hypervisor flags in TBArtyom Tarasenko2017-01-181-0/+17
* target-sparc: ignore MMU-faults if MMU is disabled in hypervisor modeArtyom Tarasenko2017-01-181-0/+2
* qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée2017-01-131-0/+3
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+779
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