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path: root/target/sparc/ldst_helper.c
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* exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé2022-02-211-0/+1
* target/sparc: Set fault address in sparc_cpu_do_unaligned_accessRichard Henderson2021-11-021-13/+0Star
* target/sparc: Remove DEBUG_UNALIGNEDRichard Henderson2021-11-021-9/+0Star
* target/sparc: Use cpu_*_mmu instead of helper_*_mmuRichard Henderson2021-10-131-7/+7
* tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson2021-10-061-1/+1
* sparc tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-161-1/+1
* target/sparc: Switch to do_transaction_failed() hookPeter Maydell2019-09-171-4/+12
* target/sparc: Check for transaction failures in MXCC stream ASI accessesPeter Maydell2019-09-171-20/+37
* target/sparc: Check for transaction failures in MMU passthrough ASIsPeter Maydell2019-09-171-16/+33
* target/sparc: Factor out the body of sparc_cpu_unassigned_access()Peter Maydell2019-09-171-95/+106
* target/sparc: Use env_cpu, env_archcpuRichard Henderson2019-06-101-18/+15Star
* tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-6/+0Star
* target/sparc: Convert to CPUClass::tlb_fillRichard Henderson2019-05-101-10/+1Star
* target: Clean up how the dump_mmu() printMarkus Armbruster2019-04-181-9/+9
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-3/+3
* sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov2017-09-011-7/+7
* cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée2017-02-241-3/+5
* target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko2017-01-181-8/+44
* target-sparc: implement UA2005 ASI_MMU (0x21)Artyom Tarasenko2017-01-181-0/+31
* target-sparc: implement auto-demapping for UA2005 CPUsArtyom Tarasenko2017-01-181-0/+22
* target-sparc: simplify ultrasparc_tsb_pointerArtyom Tarasenko2017-01-181-36/+15Star
* target-sparc: implement UA2005 TSB PointersArtyom Tarasenko2017-01-181-22/+102
* target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko2017-01-181-4/+4
* target-sparc: replace the last tlb entry when no free entries leftArtyom Tarasenko2017-01-181-2/+4
* target-sparc: ignore writes to UA2005 CPU mondo queue registerArtyom Tarasenko2017-01-181-0/+1
* target-sparc: allow priveleged ASIs in hyperprivileged modeArtyom Tarasenko2017-01-181-14/+18
* target-sparc: implement UA2005 scratchpad registersArtyom Tarasenko2017-01-181-0/+24
* target-sparc: simplify replace_tlb_entry by using TTE_PGSIZEArtyom Tarasenko2017-01-181-3/+2Star
* target-sparc: use explicit mmu register pointersArtyom Tarasenko2017-01-181-12/+54
* target-sparc: ignore MMU-faults if MMU is disabled in hypervisor modeArtyom Tarasenko2017-01-181-2/+13
* cputlb: drop flush_global flag from tlb_flushAlex Bennée2017-01-131-6/+6
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+1709