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path: root/target/sparc/translate.c
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* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-081-18/+18
* accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich2021-09-141-1/+1
* target/sparc: Drop use of gen_io_end()Peter Maydell2021-09-081-15/+10Star
* accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson2021-07-211-17/+0Star
* target/sparc: Use translator_use_goto_tbRichard Henderson2021-07-091-14/+5Star
* tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé2021-07-091-1/+0Star
* target/sparc/translate: silence the compiler warningsChen Qun2020-12-181-1/+1
* sparc tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* target/sparc: Translate flushw opcodeGiuseppe Musacchio2020-06-291-0/+2
* tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-161-1/+1
* target/sparc: fetch code with translator_ldEmilio G. Cota2019-10-281-1/+1
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-7/+7
* icount: remove unnecessary gen_io_end callsPavel Dovgalyuk2019-08-201-16/+0Star
* tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson2019-04-241-2/+2
* SPARC64: add icount supportMark Cave-Ayland2018-06-171-1/+110
* tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-8/+8
* target/sparc: convert to TranslatorOpsEmilio G. Cota2018-05-091-88/+86Star
* target/sparc: convert to DisasContextBaseEmilio G. Cota2018-05-091-47/+45Star
* target/sparc: convert to DisasJumpTypeEmilio G. Cota2018-05-091-12/+15
* sparc: fix leon3 casa instruction when MMU is disabledKONRAD Frederic2018-03-081-0/+5
* tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson2017-12-291-1/+1
* Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-1/+1
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| * disas: Remove unused flags argumentsRichard Henderson2017-10-251-1/+1
* | tcg: Initialize cpu_env genericallyRichard Henderson2017-10-241-4/+0Star
* | tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota2017-10-241-1/+1
* | target/sparc: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota2017-10-241-1/+1
* | tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota2017-10-241-3/+3
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-8/+1Star
* | tcg: Remove GET_TCGV_* and MAKE_TCGV_*Richard Henderson2017-10-241-10/+5Star
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* sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov2017-09-011-1/+1
* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-3/+2Star
* target/sparc: optimize gen_op_mulscc() using deposit opPhilippe Mathieu-Daudé2017-07-191-4/+1Star
* target/sparc: optimize various functions using extract opPhilippe Mathieu-Daudé2017-07-191-10/+5Star
* target/sparc: Restore ldstub of odd asisRichard Henderson2017-03-011-2/+25
* target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUsArtyom Tarasenko2017-01-181-0/+11
* target-sparc: use direct address translation in hyperprivileged modeArtyom Tarasenko2017-01-181-1/+1
* target-sparc: fix immediate UA2005 trapsArtyom Tarasenko2017-01-181-1/+1
* target-sparc: implement UA2005 rdhpstate and wrhpstate instructionsArtyom Tarasenko2017-01-181-2/+5
* target-sparc: implement UA2005 GL registerArtyom Tarasenko2017-01-181-2/+1Star
* target-sparc: hypervisor mode takes over nucleus modeArtyom Tarasenko2017-01-181-1/+5
* target-sparc: implement UltraSPARC-T1 Strand status ASRArtyom Tarasenko2017-01-181-0/+11
* target-sparc: store cpu super- and hypervisor flags in TBArtyom Tarasenko2017-01-181-5/+19
* target-sparc: Use ctpop helperRichard Henderson2017-01-101-1/+1
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+5924
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