| Commit message (Expand) | Author | Age | Files | Lines |
* | accel/tcg: Add pc and host_pc params to gen_intermediate_code | Richard Henderson | 2022-09-06 | 1 | -2/+3 |
* | exec/translator: Pass the locked filepointer to disas_log hook | Richard Henderson | 2022-04-20 | 1 | -3/+4 |
* | exec/memop: Adding signedness to quad definitions | Frédéric Pétrot | 2022-01-08 | 1 | -18/+18 |
* | accel/tcg: Add DisasContextBase argument to translator_ld* | Ilya Leoshkevich | 2021-09-14 | 1 | -1/+1 |
* | target/sparc: Drop use of gen_io_end() | Peter Maydell | 2021-09-08 | 1 | -15/+10 |
* | accel/tcg: Remove TranslatorOps.breakpoint_check | Richard Henderson | 2021-07-21 | 1 | -17/+0 |
* | target/sparc: Use translator_use_goto_tb | Richard Henderson | 2021-07-09 | 1 | -14/+5 |
* | tcg: Avoid including 'trace-tcg.h' in target translate.c | Philippe Mathieu-Daudé | 2021-07-09 | 1 | -1/+0 |
* | target/sparc/translate: silence the compiler warnings | Chen Qun | 2020-12-18 | 1 | -1/+1 |
* | sparc tcg cpus: Fix Lesser GPL version number | Chetan Pant | 2020-11-15 | 1 | -1/+1 |
* | target/sparc: Translate flushw opcode | Giuseppe Musacchio | 2020-06-29 | 1 | -0/+2 |
* | tcg: Search includes from the project root source directory | Philippe Mathieu-Daudé | 2020-01-16 | 1 | -1/+1 |
* | target/sparc: fetch code with translator_ld | Emilio G. Cota | 2019-10-28 | 1 | -1/+1 |
* | tcg: TCGMemOp is now accelerator independent MemOp | Tony Nguyen | 2019-09-03 | 1 | -7/+7 |
* | icount: remove unnecessary gen_io_end calls | Pavel Dovgalyuk | 2019-08-20 | 1 | -16/+0 |
* | tcg: Hoist max_insns computation to tb_gen_code | Richard Henderson | 2019-04-24 | 1 | -2/+2 |
* | SPARC64: add icount support | Mark Cave-Ayland | 2018-06-17 | 1 | -1/+110 |
* | tcg: Pass tb and index to tcg_gen_exit_tb separately | Richard Henderson | 2018-06-02 | 1 | -8/+8 |
* | target/sparc: convert to TranslatorOps | Emilio G. Cota | 2018-05-09 | 1 | -88/+86 |
* | target/sparc: convert to DisasContextBase | Emilio G. Cota | 2018-05-09 | 1 | -47/+45 |
* | target/sparc: convert to DisasJumpType | Emilio G. Cota | 2018-05-09 | 1 | -12/+15 |
* | sparc: fix leon3 casa instruction when MMU is disabled | KONRAD Frederic | 2018-03-08 | 1 | -0/+5 |
* | tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* | Richard Henderson | 2017-12-29 | 1 | -1/+1 |
* | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging | Peter Maydell | 2017-10-27 | 1 | -1/+1 |
|\ |
|
| * | disas: Remove unused flags arguments | Richard Henderson | 2017-10-25 | 1 | -1/+1 |
* | | tcg: Initialize cpu_env generically | Richard Henderson | 2017-10-24 | 1 | -4/+0 |
* | | tcg: define tcg_init_ctx and make tcg_ctx a pointer | Emilio G. Cota | 2017-10-24 | 1 | -1/+1 |
* | | target/sparc: check CF_PARALLEL instead of parallel_cpus | Emilio G. Cota | 2017-10-24 | 1 | -1/+1 |
* | | tcg: convert tb->cflags reads to tb_cflags(tb) | Emilio G. Cota | 2017-10-24 | 1 | -3/+3 |
* | | qom: Introduce CPUClass.tcg_initialize | Richard Henderson | 2017-10-24 | 1 | -8/+1 |
* | | tcg: Remove GET_TCGV_* and MAKE_TCGV_* | Richard Henderson | 2017-10-24 | 1 | -10/+5 |
|/ |
|
* | sparc: embed sparc_def_t into CPUSPARCState | Igor Mammedov | 2017-09-01 | 1 | -1/+1 |
* | tcg: Pass generic CPUState to gen_intermediate_code() | Lluís Vilanova | 2017-07-19 | 1 | -3/+2 |
* | target/sparc: optimize gen_op_mulscc() using deposit op | Philippe Mathieu-Daudé | 2017-07-19 | 1 | -4/+1 |
* | target/sparc: optimize various functions using extract op | Philippe Mathieu-Daudé | 2017-07-19 | 1 | -10/+5 |
* | target/sparc: Restore ldstub of odd asis | Richard Henderson | 2017-03-01 | 1 | -2/+25 |
* | target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs | Artyom Tarasenko | 2017-01-18 | 1 | -0/+11 |
* | target-sparc: use direct address translation in hyperprivileged mode | Artyom Tarasenko | 2017-01-18 | 1 | -1/+1 |
* | target-sparc: fix immediate UA2005 traps | Artyom Tarasenko | 2017-01-18 | 1 | -1/+1 |
* | target-sparc: implement UA2005 rdhpstate and wrhpstate instructions | Artyom Tarasenko | 2017-01-18 | 1 | -2/+5 |
* | target-sparc: implement UA2005 GL register | Artyom Tarasenko | 2017-01-18 | 1 | -2/+1 |
* | target-sparc: hypervisor mode takes over nucleus mode | Artyom Tarasenko | 2017-01-18 | 1 | -1/+5 |
* | target-sparc: implement UltraSPARC-T1 Strand status ASR | Artyom Tarasenko | 2017-01-18 | 1 | -0/+11 |
* | target-sparc: store cpu super- and hypervisor flags in TB | Artyom Tarasenko | 2017-01-18 | 1 | -5/+19 |
* | target-sparc: Use ctpop helper | Richard Henderson | 2017-01-10 | 1 | -1/+1 |
* | Move target-* CPU file into a target/ folder | Thomas Huth | 2016-12-20 | 1 | -0/+5924 |