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path: root/target/tricore/translate.c
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* target/tricore: Fix OPC2_32_RRPW_EXTR for width=0Bastian Koppelmann2021-03-141-0/+5
* target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2Bastian Koppelmann2021-03-141-1/+7
* tricore: fixed faulty conditions for extr and imaskAndreas Konopik2021-03-141-4/+4
* target/tricore: Raise EXCP_DEBUG in gen_goto_tb() for singlestepBastian Koppelmann2020-06-011-9/+9
* target/tricore: Move translate feature check to ctxBastian Koppelmann2020-06-011-27/+33
* target/tricore: Don't save pc in generate_qemu_excpBastian Koppelmann2020-06-011-1/+0Star
* tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-161-1/+1
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-4/+4
* target/tricore: Fix tricore_tr_translate_insnBastian Koppelmann2019-08-221-13/+34
* target/tricore: Implement a qemu excptions helperBastian Koppelmann2019-08-221-1/+19
* target/tricore: Use translate_loopBastian Koppelmann2019-08-221-44/+74
* target-tricore: Make env a member of DisasContextBastian Koppelmann2019-08-221-172/+168Star
* target/tricore: Use DisasContextBase APIBastian Koppelmann2019-08-221-54/+44Star
* tricore: add QSEED instructionAndreas Konopik2019-06-251-0/+3
* tricore: sync ctx.hflags with tb->flagsGeorg Hofstetter2019-06-251-0/+1
* tricore: fix RRPW_INSERT instructionDavid Brenken2019-06-251-2/+2
* tricore: add UTOF instructionDavid Brenken2019-06-251-0/+3
* tricore: add FTOIZ instructionDavid Brenken2019-06-251-0/+3
* target/tricore: Use tcg_gen_abs_tlPhilippe Mathieu-Daudé2019-05-141-22/+5Star
* tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson2019-04-241-14/+2Star
* qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster2019-04-181-13/+13
* tricore: fixed RCR_CADDN instructionDavid Brenken2019-03-081-2/+2
* tricore: fixed RCR_CADD instructionDavid Brenken2019-03-081-2/+2
* target/tricore: Fix LGPL version numberThomas Huth2019-01-301-1/+1
* tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-10/+10
* tricore: renamed masking of IEDavid Brenken2018-03-021-2/+2
* tricore: added some missing cpu instructionsDavid Brenken2018-03-021-0/+27
* Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-1/+1
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| * disas: Remove unused flags argumentsRichard Henderson2017-10-251-1/+1
* | tcg: Initialize cpu_env genericallyRichard Henderson2017-10-241-4/+0Star
* | tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota2017-10-241-1/+1
* | tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota2017-10-241-1/+1
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-4/+1Star
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* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-3/+2Star
* Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-2017-01-1...Peter Maydell2017-01-121-0/+48
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| * target-tricore: Add updfl instructionBastian Koppelmann2017-01-111-0/+3
| * target-tricore: Added new JNE instruction variantPeer Adelt2017-01-111-0/+18
| * target-tricore: Added new MOV instruction variantPeer Adelt2017-01-111-0/+16
| * target-tricore: Added MADD.F and MSUB.F instructionsBastian Koppelmann2017-01-111-0/+8
| * target-tricore: Added FTOUZ instructionBastian Koppelmann2017-01-111-0/+3
* | target-tricore: Use clrsb helperRichard Henderson2017-01-101-1/+1
* | target-tricore: Use clz opcodeRichard Henderson2017-01-101-2/+3
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* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+8869
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