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path: root/target/xtensa/helper.c
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* target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov2020-08-211-1/+3
* target/xtensa: statically allocate xtensa_insnbufs in DisasContextMax Filippov2020-04-081-0/+1
* target/xtensa: Use env_cpu, env_archcpuRichard Henderson2019-06-101-1/+1
* Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into stagingPeter Maydell2019-05-211-0/+1
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| * target/xtensa: get rid of centralized SR propertiesMax Filippov2019-05-111-0/+1
* | tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-6/+0Star
* | target/xtensa: Convert to CPUClass::tlb_fillRichard Henderson2019-05-101-13/+26
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* target: Simplify how the TARGET_cpu_list() printMarkus Armbruster2019-04-181-3/+4
* target/xtensa: reorganize register handling in translatorsMax Filippov2019-02-281-0/+15
* target/xtensa: allow multiple names for single opcodeMax Filippov2019-02-191-3/+13
* target/xtensa: don't require opcode table sortingMax Filippov2019-02-191-0/+42
* target/xtensa: move xtensa_finalize_config to xtensa_core_class_initMax Filippov2019-02-191-17/+19
* target/xtensa: don't specify windowed registers manuallyMax Filippov2019-02-111-0/+1
* target/xtensa: add qemu_cpu_kick to xtensa_runstallMax Filippov2019-01-241-1/+1
* target/xtensa: move non-HELPER functions to helper.cMax Filippov2019-01-141-3/+58
* target/xtensa: extract interrupt and exception helpersMax Filippov2019-01-141-127/+0Star
* target/xtensa: extract MMU helpersMax Filippov2019-01-141-487/+0Star
* target/xtensa: extract test for an illegal instructionMax Filippov2018-10-011-0/+6
* target/xtensa: convert to do_transaction_failedMax Filippov2018-09-171-7/+23
* target/xtensa: clean up gdbstub register handlingMax Filippov2018-08-201-11/+1Star
* target/xtensa: fix gdbstub register countsMax Filippov2018-08-201-1/+3
* hw/xtensa: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé2018-07-021-2/+3
* target/xtensa: add linux-user supportMax Filippov2018-03-161-0/+31
* target/xtensa: use correct number of registers in gdbstubMax Filippov2018-03-131-8/+20
* target/xtensa: use libisa for instruction decodingMax Filippov2018-01-091-0/+37
* xtensa: cleanup cpu type name compositionIgor Mammedov2017-10-271-1/+1
* xtensa: replace cpu_xtensa_init() with cpu_generic_init()Igor Mammedov2017-09-011-22/+0Star
* target/xtensa: hold BQL for interrupt processingAlex Bennée2017-03-091-0/+1
* target/xtensa: implement RUNSTALLMax Filippov2017-01-151-0/+13
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+730