bwlp/qemu.git - Experimental fork of QEMU with video encoding patches

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...	Peter Maydell	2017-10-30	3	-2/+6
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\| *	xtensa: cleanup cpu type name composition	Igor Mammedov	2017-10-27	3	-2/+6
* \|	Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging	Peter Maydell	2017-10-27	1	-1/+1
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\| *	disas: Remove unused flags arguments	Richard Henderson	2017-10-25	1	-1/+1
* \|	tcg: Initialize cpu_env generically	Richard Henderson	2017-10-24	1	-3/+0
* \|	tcg: define tcg_init_ctx and make tcg_ctx a pointer	Emilio G. Cota	2017-10-24	1	-1/+1
* \|	tcg: convert tb->cflags reads to tb_cflags(tb)	Emilio G. Cota	2017-10-24	1	-14/+14
* \|	qom: Introduce CPUClass.tcg_initialize	Richard Henderson	2017-10-24	1	-6/+1
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*	qom/cpu: move cpu_model null check to cpu_class_by_name()	Philippe Mathieu-Daudé	2017-10-10	1	-4/+0
*	target/xtensa: Use the pre-defined MEMTXATTRS_UNSPECIFIED macro	Alistair Francis	2017-09-26	1	-2/+2
*	target: [tcg] Use a generic enum for DISAS_ values	Lluís Vilanova	2017-09-06	1	-0/+4
*	xtensa: replace cpu_xtensa_init() with cpu_generic_init()	Igor Mammedov	2017-09-01	3	-25/+4
*	tcg: Pass generic CPUState to gen_intermediate_code()	Lluís Vilanova	2017-07-19	1	-3/+2
*	char: add backend hotswap handler	Anton Nefedov	2017-07-14	1	-1/+1
*	target/xtensa: gdbstub: drop dead return statement	Max Filippov	2017-07-11	1	-1/+0
*	target/xtensa: handle unknown registers in gdbstub	Max Filippov	2017-06-06	1	-3/+10
*	target/xtensa: support output to chardev console	Max Filippov	2017-06-06	2	-14/+53
*	target/xtensa: fix return value of read/write simcalls	Max Filippov	2017-06-06	1	-5/+20
*	target/xtensa: fix mapping direction in read/write simcalls	Max Filippov	2017-06-06	1	-2/+2
*	Merge remote-tracking branch 'remotes/xtensa/tags/20170317-xtensa' into staging	Peter Maydell	2017-03-18	1	-13/+36
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\| *	target/xtensa: fix semihosting argc/argv implementation	Max Filippov	2017-03-11	1	-13/+36
* \|	target/xtensa: hold BQL for interrupt processing	Alex Bennée	2017-03-09	2	-0/+8
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*	target/xtensa: add two missing headers to core import script	Max Filippov	2017-02-23	1	-0/+2
*	target/xtensa: sim: instantiate local memories	Max Filippov	2017-02-23	2	-0/+176
*	monitor: Fix crashes when using HMP commands without CPU	Thomas Huth	2017-02-21	1	-0/+4
*	Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into staging	Peter Maydell	2017-01-25	7	-101/+348
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\| *	target-xtensa: implement RER/WER instructions	Max Filippov	2017-01-17	6	-3/+44
\| *	target/xtensa: implement MEMCTL SR	Max Filippov	2017-01-15	6	-0/+68
\| *	target/xtensa: fix ICACHE/DCACHE options detection	Max Filippov	2017-01-15	1	-2/+2
\| *	target/xtensa: don't continue translation after exception	Max Filippov	2017-01-15	1	-1/+4
\| *	target/xtensa: support icount	Max Filippov	2017-01-15	3	-45/+143
\| *	target/xtensa: refactor CCOUNT/CCOMPARE	Max Filippov	2017-01-15	4	-46/+51
\| *	target/xtensa: implement RUNSTALL	Max Filippov	2017-01-15	3	-2/+17
\| *	target/xtensa: add static vectors selection	Max Filippov	2017-01-15	3	-3/+20
* \|	cputlb: drop flush_global flag from tlb_flush	Alex Bennée	2017-01-13	1	-1/+1
* \|	target-xtensa: Use clrsb helper	Richard Henderson	2017-01-10	1	-10/+1
* \|	target-xtensa: Use clz opcode	Richard Henderson	2017-01-10	3	-17/+11
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*	Move target-* CPU file into a target/ folder	Thomas Huth	2016-12-20	21	-0/+8786