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* target/xtensa: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé2018-06-081-3/+3
* Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into st...Peter Maydell2018-06-041-2/+2
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| * tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-2/+2
* | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2018-06-017-7/+1Star
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| * target: Do not include "exec/exec-all.h" if it is not necessaryPhilippe Mathieu-Daudé2018-06-017-7/+0Star
| * target/xtensa: Include "qemu/timer.h" to use NANOSECONDS_PER_SECONDPhilippe Mathieu-Daudé2018-05-311-0/+1
* | Make tb_invalidate_phys_addr() take a MemTxAttrs argumentPeter Maydell2018-05-311-1/+2
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* Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into st...Peter Maydell2018-05-216-167/+56Star
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| * Remove unnecessary variables for function return valueLaurent Vivier2018-05-206-167/+56Star
* | target/xtensa: Honor CPU_DUMP_FPURichard Henderson2018-05-181-1/+2
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* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510'...Peter Maydell2018-05-111-17/+33
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| * target/xtensa: Use new min/max expandersRichard Henderson2018-05-101-17/+33
* | target/xtensa: avoid integer overflow in next_page PC checkEmilio G. Cota2018-05-091-5/+4Star
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* icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk2018-04-111-2/+2
* target/xtensa: fix timers testMax Filippov2018-03-261-1/+1
* target/xtensa/import_core.sh: fix #include <xtensa-isa.h>Max Filippov2018-03-261-0/+1
* target/xtensa: add .inc. to non-top level source file namesMax Filippov2018-03-2615-13/+13
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-2/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* target/xtensa: add linux-user supportMax Filippov2018-03-167-40/+173
* target/xtensa: support MTTCGMax Filippov2018-03-132-15/+34
* target/xtensa: use correct number of registers in gdbstubMax Filippov2018-03-134-13/+41
* target/xtensa: mark register windows in the dumpMax Filippov2018-03-131-2/+7
* target/xtensa: dump correct physical registersMax Filippov2018-03-131-0/+1
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-212-1/+1
* Clean up includesMarkus Armbruster2018-02-096-3/+6
* Use #include "..." for our own headers, <...> for othersMarkus Armbruster2018-02-096-6/+6
* qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé2018-02-051-2/+2
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-2/+2
* Merge remote-tracking branch 'remotes/xtensa/tags/20180122-xtensa' into stagingPeter Maydell2018-01-2412-7/+27668
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| * target/xtensa: disas/xtensa: fix coverity warningsMax Filippov2018-01-221-2/+2
| * target/xtensa: add sample_controller coreMax Filippov2018-01-225-0/+12216
| * target/xtensa: allow different default CPU for MMU/noMMUMax Filippov2018-01-221-1/+6
| * target/xtensa: add de212 coreMax Filippov2018-01-115-0/+15440
| * target/xtensa: fix default sysrom/sysram addressesMax Filippov2018-01-111-4/+4
* | target/xtensa: Remove duplicate typedef of DisasContextPeter Maydell2018-01-121-2/+2
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* target/xtensa: implement disassemblerMax Filippov2018-01-091-0/+9
* target/xtensa: implement const16Max Filippov2018-01-091-0/+14
* target/xtensa: implement GPIO32Max Filippov2018-01-092-0/+54
* target/xtensa: implement salt/saltuMax Filippov2018-01-091-0/+18
* target/xtensa: add internal/noop SRs and opcodesMax Filippov2018-01-092-0/+35
* target/xtensa: drop DisasContext::litbaseMax Filippov2018-01-091-22/+5Star
* target/xtensa: use libisa for instruction decodingMax Filippov2018-01-093-2144/+124Star
* target/xtensa: switch fsf to libisaMax Filippov2017-12-192-0/+9846
* target/xtensa: switch dc233c to libisaMax Filippov2017-12-192-0/+15236
* target/xtensa: switch dc232b to libisaMax Filippov2017-12-192-0/+14109
* target/xtensa: update import_core.sh script for libisaMax Filippov2017-12-191-0/+15
* target/xtensa: extract FPU2000 opcode translatorsMax Filippov2017-12-192-0/+375
* target/xtensa: extract core opcode translatorsMax Filippov2017-12-192-0/+3145
* target/xtensa: import libisa sourceMax Filippov2017-12-194-0/+1978