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* Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210...Peter Maydell2021-06-0813-104/+1028
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| * target/riscv: rvb: add b-ext version cpu optionFrank Chang2021-06-082-0/+26
| * target/riscv: rvb: support and turn on B-extension from command lineKito Cheng2021-06-082-0/+5
| * target/riscv: rvb: add/shift with prefix zero-extendKito Cheng2021-06-083-0/+35
| * target/riscv: rvb: address calculationKito Cheng2021-06-083-0/+62
| * target/riscv: rvb: generalized or-combineFrank Chang2021-06-085-0/+64
| * target/riscv: rvb: generalized reverseFrank Chang2021-06-086-0/+132
| * target/riscv: rvb: rotate (left/right)Kito Cheng2021-06-083-0/+81
| * target/riscv: rvb: shift onesKito Cheng2021-06-083-0/+74
| * target/riscv: rvb: single-bit instructionsFrank Chang2021-06-083-0/+175
| * target/riscv: add gen_shifti() and gen_shiftiw() helper functionsFrank Chang2021-06-082-50/+43Star
| * target/riscv: rvb: sign-extend instructionsKito Cheng2021-06-082-0/+15
| * target/riscv: rvb: min/max instructionsKito Cheng2021-06-082-0/+28
| * target/riscv: rvb: pack two words into one registerKito Cheng2021-06-083-0/+78
| * target/riscv: rvb: logic-with-negateKito Cheng2021-06-082-0/+21
| * target/riscv: rvb: count bits setFrank Chang2021-06-083-0/+21
| * target/riscv: rvb: count leading/trailing zerosKito Cheng2021-06-084-1/+93
| * target/riscv: reformat @sh format encoding for B-extensionKito Cheng2021-06-081-5/+5
| * target/riscv: Pass the same value to oprsz and maxsz.LIU Zhiwei2021-06-081-39/+50
| * target/riscv/pmp: Add assert for ePMP operationsAlistair Francis2021-06-081-0/+4
| * target/riscv: Dump CSR mscratch/sscratch/satpChangbin Du2021-06-081-2/+5
| * target/riscv: Remove unnecessary riscv_*_names[] declarationBin Meng2021-06-082-4/+2Star
| * target/riscv: Do not include 'pmp.h' in user emulationPhilippe Mathieu-Daudé2021-06-081-0/+2
| * target/riscv: fix wfi exception behaviorJose Martins2021-06-082-3/+9
* | target/mips: Fix 'Uncoditional' typoPhilippe Mathieu-Daudé2021-06-051-3/+3
* | target/hppa: Remove unused 'memory.h' headerPhilippe Mathieu-Daudé2021-06-051-1/+0Star
* | target/nios2: fix page-fit instruction countPavel Dovgalyuk2021-06-051-1/+1
* | target/riscv: Do not include 'pmp.h' in user emulationPhilippe Mathieu-Daudé2021-06-051-0/+2
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* i386: run accel_cpu_instance_init as post_initClaudio Fontana2021-06-041-3/+7
* i386: reorder call to cpu_exec_realizefnClaudio Fontana2021-06-042-30/+61
* target/i386: Fix decode of cr8Richard Henderson2021-06-041-0/+1
* target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versaPaolo Bonzini2021-06-041-1/+1
* target/i386: tcg: fix loading of registers from 16-bit TSSPaolo Bonzini2021-06-041-14/+11Star
* target/i386: tcg: fix segment register offsets for 16-bit TSSPaolo Bonzini2021-06-041-2/+2
* softfloat: Introduce Floatx80RoundPrecRichard Henderson2021-06-033-93/+126
* hvf: Simplify post reset/init/loadvm hooksAlexander Graf2021-06-031-1/+4
* hvf: Introduce hvf vcpu structAlexander Graf2021-06-038-234/+236
* hvf: Remove hvf-accel-ops.hAlexander Graf2021-06-031-2/+0Star
* hvf: Use cpu_synchronize_state()Alexander Graf2021-06-031-5/+4Star
* hvf: Split out common code on vcpu init and destroyAlexander Graf2021-06-031-21/+2Star
* hvf: Move hvf internal definitions into common headerAlexander Graf2021-06-031-30/+1Star
* hvf: Move cpu functions into common directoryAlexander Graf2021-06-033-306/+0Star
* hvf: Move vcpu thread functions into common directoryAlexander Graf2021-06-034-171/+1Star
* hvf: Move assert_hvf_ok() into common directoryAlexander Graf2021-06-031-32/+1Star
* target/arm: Enable BFloat16 extensionsRichard Henderson2021-06-033-0/+7
* target/arm: Implement bfloat widening fma (indexed)Richard Henderson2021-06-037-1/+82
* target/arm: Implement bfloat widening fma (vector)Richard Henderson2021-06-037-4/+73
* target/arm: Implement bfloat16 matrix multiply accumulateRichard Henderson2021-06-037-3/+81
* target/arm: Implement bfloat16 dot product (indexed)Richard Henderson2021-06-037-9/+80
* target/arm: Implement bfloat16 dot product (vector)Richard Henderson2021-06-037-0/+89
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