summaryrefslogtreecommitdiffstats
path: root/target
Commit message (Expand)AuthorAgeFilesLines
* target/loongarch: Add gdb support.Xiaojuan Yang2022-06-064-0/+95
* hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang2022-06-061-0/+2
* hw/loongarch: Add support loongson3 virt machine type.Xiaojuan Yang2022-06-063-0/+5
* target/loongarch: Add timer related instructions support.Xiaojuan Yang2022-06-066-0/+56
* target/loongarch: Add other core instructions supportXiaojuan Yang2022-06-067-0/+233
* target/loongarch: Add TLB instruction supportXiaojuan Yang2022-06-065-0/+499
* target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang2022-06-068-0/+197
* target/loongarch: Add LoongArch CSR instructionXiaojuan Yang2022-06-067-1/+484
* target/loongarch: Add constant timer supportXiaojuan Yang2022-06-065-0/+77
* target/loongarch: Add LoongArch interrupt and exception handleXiaojuan Yang2022-06-063-0/+234
* target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang2022-06-067-1/+418
* target/loongarch: Implement qmp_query_cpu_definitions()Xiaojuan Yang2022-06-061-0/+26
* target/loongarch: Add basic vmstate description of CPU.Xiaojuan Yang2022-06-064-0/+94
* target/loongarch: Add CSRs definitionXiaojuan Yang2022-06-063-0/+313
* target/loongarch: Add system emulation introductionXiaojuan Yang2022-06-061-0/+54
* target/loongarch: Add target build suportSong Gao2022-06-062-0/+20
* target/loongarch: Add disassemblerSong Gao2022-06-061-0/+610
* target/loongarch: Add branch instruction translationSong Gao2022-06-063-0/+112
* target/loongarch: Add floating point load/store instruction translationSong Gao2022-06-063-0/+178
* target/loongarch: Add floating point move instruction translationSong Gao2022-06-065-0/+203
* target/loongarch: Add floating point conversion instruction translationSong Gao2022-06-065-0/+488
* target/loongarch: Add floating point comparison instruction translationSong Gao2022-06-066-0/+139
* target/loongarch: Add floating point arithmetic instruction translationSong Gao2022-06-067-0/+611
* target/loongarch: Add fixed point extra instruction translationSong Gao2022-06-065-0/+118
* target/loongarch: Add fixed point atomic instruction translationSong Gao2022-06-064-1/+159
* target/loongarch: Add fixed point load/store instruction translationSong Gao2022-06-065-0/+308
* target/loongarch: Add fixed point bit instruction translationSong Gao2022-06-065-0/+277
* target/loongarch: Add fixed point shift instruction translationSong Gao2022-06-063-0/+129
* target/loongarch: Add fixed point arithmetic instruction translationSong Gao2022-06-064-0/+485
* target/loongarch: Add main translation routinesSong Gao2022-06-064-0/+214
* target/loongarch: Add core definitionSong Gao2022-06-064-0/+606
* target/loongarch: Add READMESong Gao2022-06-061-0/+10
* x86: cpu: fixup number of addressable IDs for logical processors sharing cacheIgor Mammedov2022-06-061-4/+16
* x86: cpu: make sure number of addressable IDs for processor cores meets the specIgor Mammedov2022-06-061-1/+1
* target/i386: Fix wrong count settingYang Zhong2022-06-061-1/+1
* target/i386/tcg: Fix masking of real-mode addresses with A20 bitStephen Michael Jothen2022-06-061-1/+3
* target/s390x: kvm: Honor storage keys during emulationJanis Schoetterl-Glausch2022-06-031-0/+9
* s390: Typo fix FLOATING_POINT_SUPPPORT_ENHDr. David Alan Gilbert2022-06-023-8/+8
* Merge tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k ...Richard Henderson2022-06-025-144/+250
|\
| * target/m68k: Mark helper_raise_exception as noreturnRichard Henderson2022-06-022-3/+4
| * target/m68k: Implement FTRAPccRichard Henderson2022-06-021-0/+30
| * target/m68k: Implement TRAPVRichard Henderson2022-06-021-0/+9
| * target/m68k: Implement TPF in terms of TRAPccRichard Henderson2022-06-021-17/+2Star
| * target/m68k: Implement TRAPccRichard Henderson2022-06-024-5/+53
| * target/m68k: Fix stack frame for EXCP_ILLEGALRichard Henderson2022-06-021-1/+4
| * target/m68k: Fix address argument for EXCP_TRACERichard Henderson2022-06-022-18/+33
| * target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0Richard Henderson2022-06-023-42/+51
| * target/m68k: Fix address argument for EXCP_CHKRichard Henderson2022-06-022-25/+35
| * target/m68k: Remove retaddr in m68k_interrupt_allRichard Henderson2022-06-021-9/+6Star
| * target/m68k: Fix coding style in m68k_interrupt_allRichard Henderson2022-06-021-2/+2