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* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-axp-20210628' into...Peter Maydell2021-06-291-0/+75
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| * target/alpha: Honor the FEN bitRichard Henderson2021-06-281-0/+75
* | Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell2021-06-283-5/+10
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| * target/i386: kvm: add support for TSC scalingPaolo Bonzini2021-06-253-5/+10
* | Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into stagingPeter Maydell2021-06-2815-70/+41Star
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| * | target/mips: Merge msa32/msa64 decodetree definitionsPhilippe Mathieu-Daudé2021-06-244-32/+10Star
| * | target/mips: Remove pointless gen_msa()Philippe Mathieu-Daudé2021-06-241-6/+1Star
| * | target/mips: Optimize regnames[] arraysPhilippe Mathieu-Daudé2021-06-245-7/+7
| * | target/mips: Constify host_to_mips_errno[]Philippe Mathieu-Daudé2021-06-241-1/+1
| * | target/mips: fix emulation of nanoMIPS BPOSGE32 instructionAleksandar Rikalo2021-06-241-1/+1
| * | target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful casesPhilippe Mathieu-Daudé2021-06-241-6/+0Star
| * | target/mips: Remove SmartMIPS / MDMX unuseful commentsPhilippe Mathieu-Daudé2021-06-241-8/+0Star
| * | target/mips: Restrict some system specific declarations to sysemuPhilippe Mathieu-Daudé2021-06-241-3/+7
| * | target/mips: Move translate.h to tcg/ sub directoryPhilippe Mathieu-Daudé2021-06-241-0/+0
| * | target/mips: Move TCG trace events to tcg/ sub directoryPhilippe Mathieu-Daudé2021-06-244-2/+2
| * | target/mips: Do not abort on invalid instructionPhilippe Mathieu-Daudé2021-06-241-2/+2
| * | target/mips: Raise exception when DINSV opcode used with DSP disabledPhilippe Mathieu-Daudé2021-06-241-1/+2
| * | target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insnPhilippe Mathieu-Daudé2021-06-241-0/+4
| * | target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()Philippe Mathieu-Daudé2021-06-241-0/+2
| * | target/mips: Fix potential integer overflow (CID 1452921)Philippe Mathieu-Daudé2021-06-241-1/+2
* | | Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210...Peter Maydell2021-06-252-2/+2
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| * | target/riscv: gdbstub: Fix dynamic CSR XML generationBin Meng2021-06-241-1/+1
| * | target/riscv: Use target_ulong for the DisasContext misaAlistair Francis2021-06-241-1/+1
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* | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210624'...Peter Maydell2021-06-2416-615/+3347
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| * target/arm: Implement MTE3Peter Collingbourne2021-06-242-32/+52
| * target/arm: Make VMOV scalar <-> gpreg beatwise for MVEPeter Maydell2021-06-243-8/+75
| * target/arm: Implement MVE VADDVPeter Maydell2021-06-244-0/+76
| * target/arm: Implement MVE VHCADDPeter Maydell2021-06-244-3/+19
| * target/arm: Implement MVE VCADDPeter Maydell2021-06-244-2/+51
| * target/arm: Implement MVE VADC, VSBCPeter Maydell2021-06-244-0/+99
| * target/arm: Implement MVE VRHADDPeter Maydell2021-06-244-0/+19
| * target/arm: Implement MVE VQDMULL (vector)Peter Maydell2021-06-244-0/+70
| * target/arm: Implement MVE VQDMLSDH and VQRDMLSDHPeter Maydell2021-06-244-0/+69
| * target/arm: Implement MVE VQDMLADH and VQRDMLADHPeter Maydell2021-06-244-0/+114
| * target/arm: Implement MVE VRSHLPeter Maydell2021-06-244-0/+17
| * target/arm: Implement MVE VSHL insnPeter Maydell2021-06-244-0/+19
| * target/arm: Implement MVE VQRSHLPeter Maydell2021-06-244-0/+19
| * target/arm: Implement MVE VQSHL (vector)Peter Maydell2021-06-244-0/+56
| * target/arm: Implement MVE VQADD, VQSUB (vector)Peter Maydell2021-06-244-0/+39
| * target/arm: Implement MVE VQDMULH, VQRDMULH (vector)Peter Maydell2021-06-244-0/+40
| * target/arm: Implement MVE VQDMULL scalarPeter Maydell2021-06-244-4/+119
| * target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)Peter Maydell2021-06-244-0/+38
| * target/arm: Implement MVE VQADD and VQSUBPeter Maydell2021-06-244-0/+87
| * target/arm: Implement MVE VPSTPeter Maydell2021-06-242-0/+63
| * target/arm: Implement MVE VBRSRPeter Maydell2021-06-244-0/+49
| * target/arm: Implement MVE VHADD, VHSUB (scalar)Peter Maydell2021-06-244-0/+32
| * target/arm: Implement MVE VSUB, VMUL (scalar)Peter Maydell2021-06-244-0/+14
| * target/arm: Implement MVE VADD (scalar)Peter Maydell2021-06-244-0/+78
| * target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVHPeter Maydell2021-06-214-0/+76
| * target/arm: Implement MVE VMLSLDAVPeter Maydell2021-06-214-0/+23
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-26 07:30:29 +0100