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* target/nios2: Prevent writes to read-only or reserved control fieldsRichard Henderson2022-04-264-28/+168
* target/nios2: Clean up handling of tlbmisc in do_exceptionRichard Henderson2022-04-262-37/+73
* target/nios2: Cleanup set of CR_EXCEPTION for do_interruptRichard Henderson2022-04-261-3/+4
* target/nios2: Handle EXCP_UNALIGN and EXCP_UNALIGNDRichard Henderson2022-04-261-0/+8
* target/nios2: Hoist CPU_LOG_INT loggingRichard Henderson2022-04-261-11/+47
* target/nios2: Clean up nios2_cpu_do_interruptRichard Henderson2022-04-261-97/+44Star
* target/nios2: Create EXCP_SEMIHOST for semi-hostingRichard Henderson2022-04-263-9/+23
* target/nios2: Move R_FOO and CR_BAR into enumerationsRichard Henderson2022-04-261-37/+35Star
* target/nios2: Use hw/registerfields.h for CR_TLBMISC fieldsRichard Henderson2022-04-264-34/+39
* target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WERichard Henderson2022-04-263-5/+5
* target/nios2: Use hw/registerfields.h for CR_TLBACC fieldsRichard Henderson2022-04-262-16/+23
* target/nios2: Use hw/registerfields.h for CR_TLBADDR fieldsRichard Henderson2022-04-264-15/+16
* target/nios2: Use hw/registerfields.h for CR_EXCEPTION fieldsRichard Henderson2022-04-262-15/+26
* target/nios2: Use hw/registerfields.h for CR_STATUS fieldsRichard Henderson2022-04-261-9/+19
* target/nios2: Clean up nios2_cpu_dump_stateRichard Henderson2022-04-261-10/+9Star
* target/nios2: Split control registers away from general registersRichard Henderson2022-04-266-113/+118
* target/nios2: Remove cpu_interrupts_enabledRichard Henderson2022-04-261-5/+0Star
* target/nios2: Do not create TCGv for control registersRichard Henderson2022-04-261-7/+26
* target/nios2: Fix BRET instructionRichard Henderson2022-04-261-3/+13
* target/nios2: Split out helper for eret instructionAmir Gonnen2022-04-263-4/+16
* target/nios2: Split PC out of env->regs[]Richard Henderson2022-04-264-51/+45Star
* target/nios2: Add NUM_GP_REGS and NUM_CP_REGSAmir Gonnen2022-04-261-2/+4
* target/nios2: Stop generating code if gen_check_supervisor failsRichard Henderson2022-04-261-5/+15
* target/nios2: Check supervisor on eretAmir Gonnen2022-04-261-0/+2
* target/nios2: Build helper.c for system onlyRichard Henderson2022-04-262-4/+6
* target/nios2: Remove nios2_cpu_record_sigsegvRichard Henderson2022-04-263-21/+3Star
* target/nios2: Remove user-only nios2_cpu_do_interruptRichard Henderson2022-04-261-8/+0Star
* Merge tag 'pull-target-arm-20220422-1' of https://git.linaro.org/people/pmayd...Richard Henderson2022-04-2215-215/+203Star
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| * target/arm: Use tcg_constant_i32 in translate.hRichard Henderson2022-04-221-10/+3Star
| * target/arm: Use tcg_constant in translate-vfp.cRichard Henderson2022-04-221-53/+23Star
| * target/arm: Use smin/smax for do_sat_addsub_32Richard Henderson2022-04-221-7/+2Star
| * target/arm: Use tcg_constant in translate-neon.cRichard Henderson2022-04-221-14/+7Star
| * target/arm: Use tcg_constant in translate-m-nocp.cRichard Henderson2022-04-221-7/+5Star
| * target/arm: Simplify aa32 DISAS_WFIRichard Henderson2022-04-221-8/+4Star
| * target/arm: Simplify gen_sarRichard Henderson2022-04-221-5/+3Star
| * target/arm: Simplify GEN_SHIFT in translate.cRichard Henderson2022-04-221-10/+8Star
| * target/arm: Split out gen_rebuild_hflagsRichard Henderson2022-04-222-28/+33
| * target/arm: Split out set_btype_rawRichard Henderson2022-04-221-13/+12Star
| * target/arm: Remove fpexc32_accessRichard Henderson2022-04-223-33/+2Star
| * target/arm: Change CPUArchState.thumb to boolRichard Henderson2022-04-223-5/+5
| * target/arm: Change DisasContext.thumb to boolRichard Henderson2022-04-222-2/+2
| * target/arm: Extend store_cpu_offset to take field sizeRichard Henderson2022-04-222-9/+25
| * target/arm: Change CPUArchState.aarch64 to boolRichard Henderson2022-04-225-6/+6
| * target/arm: Change DisasContext.aarch64 to boolRichard Henderson2022-04-223-3/+3
| * target/arm: Update SCTLR bits to ARMv9.2Richard Henderson2022-04-221-0/+14
| * target/arm: Update SCR_EL3 bits to ARMv8.8Richard Henderson2022-04-221-0/+12
| * target/arm: Update ISAR fields for ARMv8.8Richard Henderson2022-04-221-0/+24
| * target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2Peter Maydell2022-04-221-2/+10
* | Merge tag 'pull-riscv-to-apply-20220422-1' of github.com:alistair23/qemu into...Richard Henderson2022-04-2213-117/+1061
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| * target/riscv: cpu: Enable native debug featureBin Meng2022-04-221-1/+1
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