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* Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201028' into...Peter Maydell2020-10-2910-22/+24
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| * ppc/: fix some comment spelling errorszhaolichang2020-10-279-14/+14
| * target/ppc: Fix kvmppc_load_htab_chunk() error reportingGreg Kurz2020-10-272-8/+8
| * spapr: Unrealize vCPUs with qdev_unrealize()Greg Kurz2020-10-271-0/+2
* | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-...Peter Maydell2020-10-292-2/+7
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| * | linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTIRichard Henderson2020-10-272-2/+7
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* | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' in...Peter Maydell2020-10-286-10/+14
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| * | target/rx: Fix Lesser GPL version numberChetan Pant2020-10-271-1/+1
| * | target/rx: Fix some comment spelling errorsLichang Zhao2020-10-272-2/+2
| * | target/sh4: fix some comment spelling errorsLichang Zhao2020-10-273-3/+3
| * | target/sh4: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé2020-10-272-6/+10
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* | Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.2-pull-re...Peter Maydell2020-10-281-0/+1
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| * target/xtensa: enable all coprocessors for linux-userMax Filippov2020-10-261-0/+1
* | Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201026' into stagingPeter Maydell2020-10-264-2/+14
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| * | s390x: pv: Fix diag318 PV fencingJanosch Frank2020-10-224-2/+14
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* | target/riscv: raise exception to HS-mode at get_physical_addressYifei Jiang2020-10-222-12/+34
* | target/riscv: Fix implementation of HLVX.WU instructionGeorg Kotheimer2020-10-221-3/+3
* | target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interruptGeorg Kotheimer2020-10-221-1/+3
* | target/riscv: Fix update of hstatus.SPVPGeorg Kotheimer2020-10-221-1/+1
* | riscv: Convert interrupt logs to use qemu_log_mask()Alistair Francis2020-10-222-2/+7
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* target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extensionPeter Maydell2020-10-203-0/+16
* target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16Peter Maydell2020-10-201-19/+28
* target/arm: Fix has_vfp/has_neon ID reg squashing for M-profilePeter Maydell2020-10-201-12/+19
* target/arm: Implement v8.1M low-overhead-loop instructionsPeter Maydell2020-10-202-2/+99
* target/arm: Implement v8.1M branch-future insns (as NOPs)Peter Maydell2020-10-203-1/+38
* target/arm: Don't allow BLX imm for M-profilePeter Maydell2020-10-201-0/+8
* target/arm: Make the t32 insn[25:23]=111 group non-overlappingPeter Maydell2020-10-201-13/+11Star
* target/arm: Implement v8.1M conditional-select insnsPeter Maydell2020-10-202-0/+63
* target/arm: Implement v8.1M NOCP handlingPeter Maydell2020-10-203-6/+22
* target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11Richard Henderson2020-10-202-8/+10
* target/arm: Fix reported EL for mte_check_failRichard Henderson2020-10-201-7/+3Star
* target/arm: Remove redundant mmu_idx lookupRichard Henderson2020-10-201-2/+1Star
* target/arm: Use tlb_flush_page_bits_by_mmuidx*Richard Henderson2020-10-201-7/+39
* target/arm: AArch32 VCVT fixed-point to float is always round-to-nearestPeter Maydell2020-10-203-13/+47
* target/arm: Fix SMLAD incorrect setting of Q bitPeter Maydell2020-10-201-11/+49
* Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20201017' ...Peter Maydell2020-10-199-109/+756
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| * target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)Philippe Mathieu-Daudé2020-10-171-1/+1
| * target/mips/cpu: Display warning when CPU is used without input clockPhilippe Mathieu-Daudé2020-10-171-0/+10
| * target/mips/cpu: Introduce mips_cpu_create_with_clock() helperPhilippe Mathieu-Daudé2020-10-172-0/+24
| * target/mips/cpu: Allow the CPU to use dynamic frequenciesPhilippe Mathieu-Daudé2020-10-172-2/+13
| * target/mips/cpu: Make cp0_count_rate a propertyPhilippe Mathieu-Daudé2020-10-172-8/+20
| * target/mips/cpu: Calculate the CP0 timer period using the CPU frequencyPhilippe Mathieu-Daudé2020-10-171-2/+2
| * target/mips: Move cp0_count_ns to CPUMIPSStatePhilippe Mathieu-Daudé2020-10-173-17/+28
| * target/mips/cp0_timer: Document TIMER_PERIOD originPhilippe Mathieu-Daudé2020-10-171-1/+11
| * target/mips/cp0_timer: Explicit unit in variable namePhilippe Mathieu-Daudé2020-10-171-9/+10
| * target/mips: Move cpu_mips_get_random() with CP0 helpersPhilippe Mathieu-Daudé2020-10-173-26/+26
| * target/mips/op_helper: Log unimplemented cache opcodePhilippe Mathieu-Daudé2020-10-171-0/+9
| * target/mips/op_helper: Document Invalidate/Writeback opcodes as no-opPhilippe Mathieu-Daudé2020-10-171-0/+5
| * target/mips/op_helper: Convert multiple if() to switch casePhilippe Mathieu-Daudé2020-10-171-4/+9
| * target/mips: Add loongson-ext lsdc2 group of instructionsJiaxun Yang2020-10-171-0/+179
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