summaryrefslogtreecommitdiffstats
path: root/target
Commit message (Expand)AuthorAgeFilesLines
* target/arm/cpu64: Validate sve vector lengths are supportedAndrew Jones2021-08-261-56/+45Star
* target/arm/cpu64: Replace kvm_supported with sve_vq_supportedAndrew Jones2021-08-261-8/+11
* target/arm/kvm64: Ensure sve vls map is completely clearAndrew Jones2021-08-261-1/+1
* target/arm/cpu: Introduce sve_vq_supported bitmapAndrew Jones2021-08-262-0/+6
* Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...Peter Maydell2021-08-261-1/+9
|\
| * i386/cpu: Remove AVX_VNNI feature from Cooperlake cpu modelYang Zhong2021-08-251-1/+1
| * target/i386: Remove split lock detect in Snowridge CPU modelChenyi Qiang2021-08-251-0/+8
* | Merge remote-tracking branch 'remotes/philmd/tags/mips-20210825' into stagingPeter Maydell2021-08-2519-486/+502
|\ \
| * | target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()Philippe Mathieu-Daudé2021-08-253-45/+50
| * | target/mips: Store CP0_Config0 in DisasContextPhilippe Mathieu-Daudé2021-08-252-0/+2
| * | target/mips: Replace GET_LMASK64() macro by get_lmask(64) functionPhilippe Mathieu-Daudé2021-08-251-19/+16Star
| * | target/mips: Replace GET_LMASK() macro by get_lmask(32) functionPhilippe Mathieu-Daudé2021-08-251-11/+21
| * | target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpersPhilippe Mathieu-Daudé2021-08-251-22/+33
| * | target/mips: Define gen_helper() macros in translate.hPhilippe Mathieu-Daudé2021-08-252-12/+12
| * | target/mips: Use tcg_constant_i32() in generate_exception_err()Philippe Mathieu-Daudé2021-08-251-5/+2Star
| * | target/mips: Inline gen_helper_0e0i()Philippe Mathieu-Daudé2021-08-251-6/+2Star
| * | target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macrosPhilippe Mathieu-Daudé2021-08-251-5/+1Star
| * | target/mips: Simplify gen_helper() macros by using tcg_constant_i32()Philippe Mathieu-Daudé2021-08-251-15/+5Star
| * | target/mips: Use tcg_constant_i32() in gen_helper_0e2i()Philippe Mathieu-Daudé2021-08-251-12/+2Star
| * | target/mips: Remove gen_helper_1e2i()Philippe Mathieu-Daudé2021-08-251-6/+0Star
| * | target/mips: Remove gen_helper_0e3i()Philippe Mathieu-Daudé2021-08-251-6/+0Star
| * | target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXTPhilippe Mathieu-Daudé2021-08-251-2/+0Star
| * | target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddrPhilippe Mathieu-Daudé2021-08-251-1/+1
| * | target/mips: Document Loongson-3A CPU definitionsPhilippe Mathieu-Daudé2021-08-251-2/+2
| * | target/mips: Convert Vr54xx MSA* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-253-53/+14Star
| * | target/mips: Convert Vr54xx MUL* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-253-24/+18Star
| * | target/mips: Convert Vr54xx MACC* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-253-16/+42
| * | target/mips: Introduce decodetree structure for NEC Vr54xx extensionPhilippe Mathieu-Daudé2021-08-255-0/+33
| * | target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.cPhilippe Mathieu-Daudé2021-08-253-118/+143
| * | target/mips: Extract NEC Vr54xx helper definitionsPhilippe Mathieu-Daudé2021-08-252-15/+27
| * | target/mips: Introduce generic TRANS() macro for decodetree helpersPhilippe Mathieu-Daudé2021-08-251-0/+8
| * | target/mips: Rename 'rtype' as 'r'Philippe Mathieu-Daudé2021-08-256-46/+46
| * | target/mips: Merge 32-bit/64-bit Release6 decodetree definitionsPhilippe Mathieu-Daudé2021-08-254-40/+19Star
| * | target/mips: Decode vendor extensions before MIPS ISAsPhilippe Mathieu-Daudé2021-08-251-3/+5
| * | target/mips: Simplify PREF opcodePhilippe Mathieu-Daudé2021-08-251-6/+2Star
| * | target/mips: Remove JR opcode unused argumentsPhilippe Mathieu-Daudé2021-08-251-1/+1
| |/
* | target/arm: kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route()Hamza Mahfooz2021-08-251-9/+8Star
* | target/arm: Implement M-profile trapping on division by zeroPeter Maydell2021-08-255-6/+26
* | target/arm: Re-indent sdiv and udiv helpersPeter Maydell2021-08-251-6/+9
* | target/arm: Implement MVE interleaving loads/storesPeter Maydell2021-08-254-0/+495
* | target/arm: Implement MVE scatter-gather immediate formsPeter Maydell2021-08-254-36/+150
* | target/arm: Implement MVE scatter-gather insnsPeter Maydell2021-08-254-0/+270
* | target/arm: Implement MVE VCTPPeter Maydell2021-08-256-1/+58
* | target/arm: Implement MVE VPNOTPeter Maydell2021-08-254-0/+38
* | target/arm: Implement MVE VMOV to/from 2 general-purpose registersPeter Maydell2021-08-254-1/+91
* | target/arm: Implement MVE VMAXA, VMINAPeter Maydell2021-08-254-0/+40
* | target/arm: Implement MVE VQABS, VQNEGPeter Maydell2021-08-254-0/+50
* | target/arm: Implement MVE saturating doubling multiply accumulatesPeter Maydell2021-08-254-0/+120
* | target/arm: Implement MVE VMLAPeter Maydell2021-08-254-0/+11
* | target/arm: Implement MVE VMLADAV and VMLSLDAVPeter Maydell2021-08-254-5/+150
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-15 20:04:06 +0100