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* target/arm: Mark SMMLA, UMMLA, USMMLA as non-streamingRichard Henderson2022-07-112-7/+6Star
* target/arm: Mark FTSMUL, FTMAD, FADDA as non-streamingRichard Henderson2022-07-112-7/+11
* target/arm: Mark PMULL, FMMLA as non-streamingRichard Henderson2022-07-112-11/+15
* target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as non-streamingRichard Henderson2022-07-112-13/+12Star
* target/arm: Mark RDFFR, WRFFR, SETFFR as non-streamingRichard Henderson2022-07-112-5/+6
* target/arm: Mark ADR as non-streamingRichard Henderson2022-07-113-5/+11
* target/arm: Trap non-streaming usage when Streaming SVE is activeRichard Henderson2022-07-118-2/+195
* target/arm: Add infrastructure for disas_smeRichard Henderson2022-07-115-1/+64
* target/arm: Handle SME in aarch64_cpu_dump_stateRichard Henderson2022-07-111-1/+16
* Merge tag 'pull-target-arm-20220707' of https://git.linaro.org/people/pmaydel...Richard Henderson2022-07-089-514/+637
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| * target/arm: Fix qemu-system-arm handling of LPAE block descriptors for highmemPeter Maydell2022-07-071-1/+1
| * target/arm: Correctly implement Feat_DoubleLockPeter Maydell2022-07-072-2/+38
| * target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2Peter Maydell2022-07-074-0/+55
| * target/arm: Suppress debug exceptions when OS Lock setPeter Maydell2022-07-071-0/+3
| * target/arm: Move define_debug_regs() to debug_helper.cPeter Maydell2022-07-074-530/+538
| * target/arm: Fix code style issues in debug helper functionsPeter Maydell2022-07-071-20/+38
| * target/arm: Record tagged bit for user-only in sve_probe_pageRichard Henderson2022-07-071-0/+3
| * target/arm: Fix MTE check in sve_ldnfff1_rRichard Henderson2022-07-071-1/+1
* | Merge tag 'pull-request-2022-07-07' of https://gitlab.com/thuth/qemu into sta...Richard Henderson2022-07-072-25/+24Star
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| * target/s390x: Exit tb after executing ex_valueRichard Henderson2022-07-061-1/+1
| * target/s390x: Remove DISAS_PC_STALE_NOCHAINRichard Henderson2022-07-061-10/+11
| * target/s390x: Remove DISAS_PC_STALERichard Henderson2022-07-061-9/+4Star
| * target/s390x: Remove DISAS_GOTO_TBRichard Henderson2022-07-061-6/+2Star
| * target/s390x/tcg: SPX: check validity of new prefixJanis Schoetterl-Glausch2022-07-061-0/+7
* | target/ppc: Fix MPC8555 and MPC8560 core type to e500v1Pali Rohár2022-07-062-14/+14
* | target/ppc/cpu-models: Remove the "default" CPU aliasThomas Huth2022-07-061-1/+1
* | target/ppc: Return default CPU for max CPUMurilo Opsfelder Araujo2022-07-062-1/+19
* | target/ppc: implement cdtbcdMatheus Ferst2022-07-064-0/+35
* | target/ppc: implement cbcdtdMatheus Ferst2022-07-064-0/+51
* | target/ppc: implement addg6sMatheus Ferst2022-07-062-0/+41
* | target/ppc: Add flag for ISA v2.06 BCDA instructionsMatheus Ferst2022-07-062-5/+10
* | target/ppc: Implement mffscdrn[i] instructionsVíctor Colombo2022-07-062-0/+46
* | target/ppc: Move mffs[.] to decodetreeVíctor Colombo2022-07-063-19/+21
* | target/ppc: Move mffsl to decodetreeVíctor Colombo2022-07-063-24/+17Star
* | target/ppc: Move mffsce to decodetreeVíctor Colombo2022-07-063-32/+20Star
* | target/ppc: Move mffscrn[i] to decodetreeVíctor Colombo2022-07-064-48/+50
* | target/ppc: Fix insn32.decode style issuesVíctor Colombo2022-07-061-12/+12
* | ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy2022-07-061-0/+12
* | target/ppc: use int128.h methods in vsubcuqMatheus Ferst2022-07-065-52/+9Star
* | target/ppc: use int128.h methods in vsubecuq and vsubeuqmMatheus Ferst2022-07-065-36/+17Star
* | target/ppc: use int128.h methods in vsubuqmMatheus Ferst2022-07-065-22/+8Star
* | target/ppc: use int128.h methods in vaddcuqMatheus Ferst2022-07-065-13/+5Star
* | target/ppc: use int128.h methods in vaddecuq and vaddeuqmMatheus Ferst2022-07-065-51/+17Star
* | target/ppc: use int128.h methods in vadduqmMatheus Ferst2022-07-065-9/+7Star
* | target/ppc: use int128.h methods in vpmsumdMatheus Ferst2022-07-065-41/+17Star
* | target/ppc: Change FPSCR_* to follow POWER ISA numbering conventionVíctor Colombo2022-07-061-36/+36
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* Merge tag 'pull-request-2022-07-05' of https://gitlab.com/thuth/qemu into sta...Richard Henderson2022-07-051-7/+0Star
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| * disas: Remove libvixl disassemblerThomas Huth2022-07-051-7/+0Star
* | target/loongarch: Clean up tlb when cpu resetSong Gao2022-07-051-0/+1
* | target/loongarch: Add lock when writing timer clear regXiaojuan Yang2022-07-041-0/+2