| Commit message (Expand) | Author | Age | Files | Lines |
* | target/arm: Mark SMMLA, UMMLA, USMMLA as non-streaming | Richard Henderson | 2022-07-11 | 2 | -7/+6 |
* | target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming | Richard Henderson | 2022-07-11 | 2 | -7/+11 |
* | target/arm: Mark PMULL, FMMLA as non-streaming | Richard Henderson | 2022-07-11 | 2 | -11/+15 |
* | target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as non-streaming | Richard Henderson | 2022-07-11 | 2 | -13/+12 |
* | target/arm: Mark RDFFR, WRFFR, SETFFR as non-streaming | Richard Henderson | 2022-07-11 | 2 | -5/+6 |
* | target/arm: Mark ADR as non-streaming | Richard Henderson | 2022-07-11 | 3 | -5/+11 |
* | target/arm: Trap non-streaming usage when Streaming SVE is active | Richard Henderson | 2022-07-11 | 8 | -2/+195 |
* | target/arm: Add infrastructure for disas_sme | Richard Henderson | 2022-07-11 | 5 | -1/+64 |
* | target/arm: Handle SME in aarch64_cpu_dump_state | Richard Henderson | 2022-07-11 | 1 | -1/+16 |
* | Merge tag 'pull-target-arm-20220707' of https://git.linaro.org/people/pmaydel... | Richard Henderson | 2022-07-08 | 9 | -514/+637 |
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| * | target/arm: Fix qemu-system-arm handling of LPAE block descriptors for highmem | Peter Maydell | 2022-07-07 | 1 | -1/+1 |
| * | target/arm: Correctly implement Feat_DoubleLock | Peter Maydell | 2022-07-07 | 2 | -2/+38 |
| * | target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 | Peter Maydell | 2022-07-07 | 4 | -0/+55 |
| * | target/arm: Suppress debug exceptions when OS Lock set | Peter Maydell | 2022-07-07 | 1 | -0/+3 |
| * | target/arm: Move define_debug_regs() to debug_helper.c | Peter Maydell | 2022-07-07 | 4 | -530/+538 |
| * | target/arm: Fix code style issues in debug helper functions | Peter Maydell | 2022-07-07 | 1 | -20/+38 |
| * | target/arm: Record tagged bit for user-only in sve_probe_page | Richard Henderson | 2022-07-07 | 1 | -0/+3 |
| * | target/arm: Fix MTE check in sve_ldnfff1_r | Richard Henderson | 2022-07-07 | 1 | -1/+1 |
* | | Merge tag 'pull-request-2022-07-07' of https://gitlab.com/thuth/qemu into sta... | Richard Henderson | 2022-07-07 | 2 | -25/+24 |
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| * | target/s390x: Exit tb after executing ex_value | Richard Henderson | 2022-07-06 | 1 | -1/+1 |
| * | target/s390x: Remove DISAS_PC_STALE_NOCHAIN | Richard Henderson | 2022-07-06 | 1 | -10/+11 |
| * | target/s390x: Remove DISAS_PC_STALE | Richard Henderson | 2022-07-06 | 1 | -9/+4 |
| * | target/s390x: Remove DISAS_GOTO_TB | Richard Henderson | 2022-07-06 | 1 | -6/+2 |
| * | target/s390x/tcg: SPX: check validity of new prefix | Janis Schoetterl-Glausch | 2022-07-06 | 1 | -0/+7 |
* | | target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 | Pali Rohár | 2022-07-06 | 2 | -14/+14 |
* | | target/ppc/cpu-models: Remove the "default" CPU alias | Thomas Huth | 2022-07-06 | 1 | -1/+1 |
* | | target/ppc: Return default CPU for max CPU | Murilo Opsfelder Araujo | 2022-07-06 | 2 | -1/+19 |
* | | target/ppc: implement cdtbcd | Matheus Ferst | 2022-07-06 | 4 | -0/+35 |
* | | target/ppc: implement cbcdtd | Matheus Ferst | 2022-07-06 | 4 | -0/+51 |
* | | target/ppc: implement addg6s | Matheus Ferst | 2022-07-06 | 2 | -0/+41 |
* | | target/ppc: Add flag for ISA v2.06 BCDA instructions | Matheus Ferst | 2022-07-06 | 2 | -5/+10 |
* | | target/ppc: Implement mffscdrn[i] instructions | Víctor Colombo | 2022-07-06 | 2 | -0/+46 |
* | | target/ppc: Move mffs[.] to decodetree | Víctor Colombo | 2022-07-06 | 3 | -19/+21 |
* | | target/ppc: Move mffsl to decodetree | Víctor Colombo | 2022-07-06 | 3 | -24/+17 |
* | | target/ppc: Move mffsce to decodetree | Víctor Colombo | 2022-07-06 | 3 | -32/+20 |
* | | target/ppc: Move mffscrn[i] to decodetree | Víctor Colombo | 2022-07-06 | 4 | -48/+50 |
* | | target/ppc: Fix insn32.decode style issues | Víctor Colombo | 2022-07-06 | 1 | -12/+12 |
* | | ppc: Define SETFIELD for the ppc target | Alexey Kardashevskiy | 2022-07-06 | 1 | -0/+12 |
* | | target/ppc: use int128.h methods in vsubcuq | Matheus Ferst | 2022-07-06 | 5 | -52/+9 |
* | | target/ppc: use int128.h methods in vsubecuq and vsubeuqm | Matheus Ferst | 2022-07-06 | 5 | -36/+17 |
* | | target/ppc: use int128.h methods in vsubuqm | Matheus Ferst | 2022-07-06 | 5 | -22/+8 |
* | | target/ppc: use int128.h methods in vaddcuq | Matheus Ferst | 2022-07-06 | 5 | -13/+5 |
* | | target/ppc: use int128.h methods in vaddecuq and vaddeuqm | Matheus Ferst | 2022-07-06 | 5 | -51/+17 |
* | | target/ppc: use int128.h methods in vadduqm | Matheus Ferst | 2022-07-06 | 5 | -9/+7 |
* | | target/ppc: use int128.h methods in vpmsumd | Matheus Ferst | 2022-07-06 | 5 | -41/+17 |
* | | target/ppc: Change FPSCR_* to follow POWER ISA numbering convention | Víctor Colombo | 2022-07-06 | 1 | -36/+36 |
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* | Merge tag 'pull-request-2022-07-05' of https://gitlab.com/thuth/qemu into sta... | Richard Henderson | 2022-07-05 | 1 | -7/+0 |
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| * | disas: Remove libvixl disassembler | Thomas Huth | 2022-07-05 | 1 | -7/+0 |
* | | target/loongarch: Clean up tlb when cpu reset | Song Gao | 2022-07-05 | 1 | -0/+1 |
* | | target/loongarch: Add lock when writing timer clear reg | Xiaojuan Yang | 2022-07-04 | 1 | -0/+2 |