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* general: Replace global smp variables with smp machine propertiesLike Xu2019-07-051-1/+5
* target/i386: fix feature check in hyperv-stub.cAlex Bennée2019-07-041-1/+1
* target/arm: Correct VMOV_imm_dp handling of short vectorsPeter Maydell2019-07-041-1/+1
* target/arm: Execute Thumb instructions when their condbits are 0xfPeter Maydell2019-07-041-2/+13
* target/arm: Use _ra versions of cpu_stl_data() in v7M helpersPeter Maydell2019-07-041-9/+12
* target/arm/helper: Move M profile routines to m_helper.cPhilippe Mathieu-Daudé2019-07-043-2634/+2681
* target/arm: Restrict semi-hosting to TCGPhilippe Mathieu-Daudé2019-07-043-2/+15
* target/arm: Move debug routines to debug_helper.cPhilippe Mathieu-Daudé2019-07-044-302/+315
* Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.1-sf1-v3...Peter Maydell2019-07-0411-61/+231
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| * RISC-V: Clear load reservations on context switch and SCJoel Sing2019-06-263-1/+18
| * RISC-V: Add support for the Zicsr extensionPalmer Dabbelt2019-06-263-0/+8
| * RISC-V: Add support for the Zifencei extensionPalmer Dabbelt2019-06-264-0/+9
| * target/riscv: Add support for disabling/enabling CountersAlistair Francis2019-06-253-5/+14
| * target/riscv: Remove user version informationAlistair Francis2019-06-252-25/+9Star
| * target/riscv: Require either I or E base extensionAlistair Francis2019-06-251-0/+6
| * target/riscv: Set privledge spec 1.11.0 as defaultAlistair Francis2019-06-251-3/+5
| * target/riscv: Add the mcountinhibit CSRAlistair Francis2019-06-252-2/+16
| * target/riscv: Add the privledge spec version 1.11.0Alistair Francis2019-06-242-1/+2
| * target/riscv: Restructure deprecatd CPUsAlistair Francis2019-06-242-14/+17
| * RISC-V: Fix a PMP check with the correct access sizeHesham Almatary2019-06-241-2/+1Star
| * RISC-V: Fix a PMP bug where it succeeds even if PMP entry is offHesham Almatary2019-06-241-4/+5
| * RISC-V: Check PMP during Page Table WalksHesham Almatary2019-06-242-1/+10
| * RISC-V: Check for the effective memory privilege mode during PMP checksHesham Almatary2019-06-243-5/+13
| * RISC-V: Raise access fault exceptions on PMP violationsHesham Almatary2019-06-241-3/+6
| * RISC-V: Only Check PMP if MMU translation succeedsHesham Almatary2019-06-241-0/+1
| * target/riscv: Implement riscv_cpu_unassigned_accessMichael Clark2019-06-243-0/+19
| * target/riscv: Fix PMP range boundary address bugDayeol Lee2019-06-241-1/+1
| * target/riscv: Allow setting ISA extensions via CPU propsAlistair Francis2019-06-242-2/+79
* | Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jul-02-2019' ...Peter Maydell2019-07-032-274/+483
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| * | target/mips: Correct helper for MSA FCLASS.<W|D> instructionsAleksandar Markovic2019-07-021-1/+3
| * | target/mips: Unroll loops for MSA float max/min instructionsAleksandar Markovic2019-07-021-73/+125
| * | target/mips: Correct comments in msa_helper.cAleksandar Markovic2019-07-021-17/+41
| * | target/mips: Correct comments in translate.cAleksandar Markovic2019-07-021-183/+314
* | | Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-07-02-v2'...Peter Maydell2019-07-0315-16/+16
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| * | | qapi: Rename target.json to misc-target.jsonMarkus Armbruster2019-07-022-2/+2
| * | | qapi: Split machine-target.json off target.json and misc.jsonMarkus Armbruster2019-07-025-5/+5
| * | | qapi: Split machine.json off misc.jsonMarkus Armbruster2019-07-023-3/+3
| * | | hmp: Move hmp.h to include/monitor/Markus Armbruster2019-07-026-6/+6
* | | | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190702' into...Peter Maydell2019-07-0210-912/+972
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| * | | | target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macroMark Cave-Ayland2019-07-024-145/+122Star
| * | | | target/ppc: decode target register in VSX_EXTRACT_INSERT at translation timeMark Cave-Ayland2019-07-023-15/+11Star
| * | | | target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at transla...Mark Cave-Ayland2019-07-023-31/+30Star
| * | | | target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.cMark Cave-Ayland2019-07-023-12/+28
| * | | | target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.cMark Cave-Ayland2019-07-023-38/+50
| * | | | target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.cMark Cave-Ayland2019-07-023-40/+48
| * | | | target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.cMark Cave-Ayland2019-07-023-12/+26
| * | | | target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.cMark Cave-Ayland2019-07-023-21/+36
| * | | | target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.cMark Cave-Ayland2019-07-023-147/+144Star
| * | | | target/ppc: introduce separate generator and helper for xscvqpdpMark Cave-Ayland2019-07-023-5/+20
| * | | | target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.cMark Cave-Ayland2019-07-023-148/+151
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