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* tcg: Remove TCG_TARGET_HAS_cmp_vecRichard Henderson2020-10-081-1/+0Star
* tcg: Remove TCG_CT_REGRichard Henderson2020-10-081-3/+0Star
* tcg: Drop union from TCGArgConstraintRichard Henderson2020-10-081-7/+7
* qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi2020-09-231-1/+1
* meson: rename included C source files to .c.incPaolo Bonzini2020-08-211-2/+2
* tcg/aarch64: Implement INDEX_op_rotl{i,v}_vecRichard Henderson2020-06-022-2/+52
* tcg: Implement gvec support for rotate by scalarRichard Henderson2020-06-021-0/+1
* tcg: Implement gvec support for rotate by vectorRichard Henderson2020-06-021-0/+1
* tcg: Implement gvec support for rotate by immediateRichard Henderson2020-06-021-0/+1
* tcg: Search includes in the parent source directoryPhilippe Mathieu-Daudé2020-01-161-2/+2
* tcg/aarch64/tcg-target.opc.h: Add copyright/licensePeter Maydell2019-11-111-3/+12
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-13/+13
* tcg/aarch64: Fix output of extract2 opcodesRichard Henderson2019-07-141-1/+1
* tcg/aarch64: Use LDP to load tlb mask+tableRichard Henderson2019-06-101-7/+8
* cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson2019-06-101-23/+6Star
* tcg: Create struct CPUTLBRichard Henderson2019-06-101-7/+3Star
* tcg/aarch64: Allow immediates for vector ORR and BICRichard Henderson2019-05-221-7/+83
* tcg/aarch64: Build vector immediates with two insnsRichard Henderson2019-05-221-0/+47
* tcg/aarch64: Use MVNI in tcg_out_dupi_vecRichard Henderson2019-05-221-0/+11
* tcg/aarch64: Split up is_fimmRichard Henderson2019-05-221-84/+119
* tcg/aarch64: Support vector bitwise select valueRichard Henderson2019-05-222-2/+24
* tcg: Add support for vector compare selectRichard Henderson2019-05-221-0/+1
* tcg: Add support for vector bitwise selectRichard Henderson2019-05-221-0/+1
* tcg/aarch64: Do not advertise minmax for MO_64Richard Henderson2019-05-141-4/+4
* tcg/aarch64: Support vector absolute valueRichard Henderson2019-05-142-1/+7
* tcg: Add support for vector absolute valueRichard Henderson2019-05-141-0/+1
* tcg/aarch64: Support vector variable shift opcodesRichard Henderson2019-05-143-1/+45
* tcg: Add INDEX_op_dupm_vecRichard Henderson2019-05-141-0/+4
* tcg/aarch64: Implement tcg_out_dupm_vecRichard Henderson2019-05-141-2/+35
* tcg: Add tcg_out_dupm_vec to the backend interfaceRichard Henderson2019-05-131-0/+6
* tcg: Manually expand INDEX_op_dup_vecRichard Henderson2019-05-131-5/+4Star
* tcg: Promote tcg_out_{dup,dupi}_vec to backend interfaceRichard Henderson2019-05-131-2/+10
* tcg: Return bool success from tcg_out_movRichard Henderson2019-05-131-2/+3
* tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson2019-04-241-6/+10
* tcg/aarch64: Support INDEX_op_extract2_{i32,i64}Richard Henderson2019-04-242-2/+13
* tcg: Add INDEX_op_extract2_{i32,i64}Richard Henderson2019-04-241-0/+2
* cputlb: Remove static tlb sizingRichard Henderson2019-01-281-1/+0Star
* tcg/aarch64: enable dynamic TLB sizingRichard Henderson2019-01-282-42/+60
* tcg: introduce dynamic TLB sizingEmilio G. Cota2019-01-281-0/+1
* tcg/aarch64: Implement vector minmax arithmeticRichard Henderson2019-01-282-1/+25
* tcg/aarch64: Implement vector saturating arithmeticRichard Henderson2019-01-282-1/+25
* tcg: Add opcodes for vector minmax arithmeticRichard Henderson2019-01-281-0/+1
* tcg: Add opcodes for vector saturated arithmeticRichard Henderson2019-01-281-0/+1
* tcg: Add TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson2018-12-171-0/+1
* tcg/aarch64: Return false on failure from patch_relocRichard Henderson2018-12-171-16/+21
* tcg: Return success from patch_relocRichard Henderson2018-12-171-1/+2
* tcg/aarch64: Fold away "noaddr" branch routinesRichard Henderson2018-12-171-19/+2Star
* tcg/aarch64: Remove reloc_pc26_atomicRichard Henderson2018-12-171-12/+0Star
* tcg/aarch64: limit mul_vec sizeAlex Bennée2018-07-191-1/+2
* tcg: Reduce max TB opcode countRichard Henderson2018-06-151-1/+1
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