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path: root/tcg/arm/tcg-target.c.inc
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* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-2/+2
* tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1Richard Henderson2022-03-141-2/+15
* tcg/arm: Support raising sigbus for user-onlyRichard Henderson2022-02-081-2/+81
* tcg/arm: Reserve a register for guest_baseRichard Henderson2022-02-081-11/+28
* tcg/arm: Support unaligned access for softmmuRichard Henderson2022-02-081-20/+21
* tcg/arm: Check alignment for ldrd and strdRichard Henderson2022-02-081-15/+8Star
* tcg/arm: Remove use_armv6_instructionsRichard Henderson2022-02-081-165/+27Star
* tcg/arm: Remove use_armv5t_instructionsRichard Henderson2022-02-081-29/+6Star
* tcg/arm: Drop support for armv4 and armv5 hostsRichard Henderson2022-02-081-0/+5
* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-081-5/+5
* tcg/arm: Reduce vector alignment requirement for NEONRichard Henderson2021-12-071-4/+9
* tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson2021-10-061-5/+5
* tcg: Expand MO_SIZE to 3 bitsRichard Henderson2021-10-061-2/+2
* tcg/arm: More use of the TCGReg enumRichard Henderson2021-09-141-30/+35
* tcg/arm: More use of the ARMInsn enumRichard Henderson2021-09-141-10/+10
* tcg/arm: Give enum arm_cond_code_e a typedef and use itRichard Henderson2021-09-141-68/+68
* tcg/arm: Drop inline markersRichard Henderson2021-09-141-120/+114Star
* tcg/arm: Simplify usage of encode_immRichard Henderson2021-09-141-64/+77
* tcg/arm: Split out tcg_out_ldstmRichard Henderson2021-09-141-2/+17
* tcg/arm: Support armv4t in tcg_out_goto and tcg_out_callRichard Henderson2021-09-141-15/+34
* tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}Richard Henderson2021-09-141-16/+22
* tcg/arm: Fix tcg_out_vec_op function signatureJose R. Ziviani2021-09-141-1/+2
* misc: Fix "havn't" typoPhilippe Mathieu-Daudé2021-07-091-2/+4
* tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson2021-06-291-138/+76Star
* tcg/arm: Support bswap flagsRichard Henderson2021-06-291-38/+63
* tcg/arm: Fix tcg_out_op function signatureJose R. Ziviani2021-06-141-1/+2
* tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson2021-06-041-1/+34
* tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson2021-06-041-0/+15
* tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson2021-06-041-1/+60
* tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson2021-06-041-2/+20
* tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson2021-06-041-0/+24
* tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson2021-06-041-0/+24
* tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson2021-06-041-0/+6
* tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson2021-06-041-0/+27
* tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson2021-06-041-0/+38
* tcg/arm: Implement minimal vector operationsRichard Henderson2021-06-041-5/+192
* tcg/arm: Implement tcg_out_dup*_vecRichard Henderson2021-06-041-8/+275
* tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson2021-06-041-6/+46
* tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson2021-06-041-6/+64
* tcg/arm: Add host vector frameworkRichard Henderson2021-06-041-18/+99
* tcg: Change parameters for tcg_target_const_matchRichard Henderson2021-06-041-4/+1Star
* tcg/arm: Split out constraint sets to tcg-target-con-set.hRichard Henderson2021-02-021-63/+33Star
* tcg/arm: Split out target constraints to tcg-target-con-str.hRichard Henderson2021-02-021-56/+18Star
* tcg: Remove movi and dupi opcodesRichard Henderson2021-01-131-1/+0Star
* tcg: Constify TCGLabelQemuLdst.raddrRichard Henderson2021-01-071-2/+1Star
* tcg: Constify tcg_code_gen_epilogueRichard Henderson2021-01-071-2/+1Star
* tcg/arm: Support split-wx code generationRichard Henderson2021-01-071-16/+21
* tcg: Adjust tcg_register_jit for constRichard Henderson2021-01-071-1/+1
* tcg: Adjust tcg_out_call for constRichard Henderson2021-01-071-1/+1
* tcg: Adjust TCGLabel for constRichard Henderson2021-01-071-1/+1
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