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* tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson2021-06-041-1/+34
* tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson2021-06-043-0/+17
* tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson2021-06-042-1/+63
* tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson2021-06-043-3/+22
* tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson2021-06-042-1/+25
* tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson2021-06-042-1/+25
* tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson2021-06-042-1/+7
* tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson2021-06-042-1/+28
* tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson2021-06-043-5/+44
* tcg/arm: Implement minimal vector operationsRichard Henderson2021-06-044-6/+202
* tcg/arm: Implement tcg_out_dup*_vecRichard Henderson2021-06-041-8/+275
* tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson2021-06-041-6/+46
* tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson2021-06-041-6/+64
* tcg/arm: Add host vector frameworkRichard Henderson2021-06-045-24/+158
* tcg: Change parameters for tcg_target_const_matchRichard Henderson2021-06-0410-36/+12Star
* docs: fix references to docs/devel/atomics.rstStefano Garzarella2021-06-021-1/+1
* tcg/aarch64: Fix tcg_out_rotlYasuo Kuwahara2021-05-271-3/+2Star
* Do not include cpu.h if it's not really necessaryThomas Huth2021-05-023-3/+0Star
* Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth2021-05-021-1/+0Star
* tcg/mips: Fix SoftTLB comparison on mips backendKele Huang2021-04-051-1/+1
* tcg: Workaround macOS 11.2 mprotect bugRichard Henderson2021-03-241-3/+7
* tcg: Do not set guard pages on the rx portion of code_gen_bufferRichard Henderson2021-03-241-7/+5Star
* tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina2021-03-178-19/+31
* tcg/tci: Split out tcg_out_op_r[iI]Richard Henderson2021-03-171-15/+35
* tcg/tci: Split out tcg_out_op_vRichard Henderson2021-03-171-4/+10
* tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}Richard Henderson2021-03-171-17/+53
* tcg/tci: Split out tcg_out_op_rrrrclRichard Henderson2021-03-171-8/+19
* tcg/tci: Split out tcg_out_op_rrrrRichard Henderson2021-03-171-6/+15
* tcg/tci: Split out tcg_out_op_rrrrrrRichard Henderson2021-03-171-8/+19
* tcg/tci: Split out tcg_out_op_rrclRichard Henderson2021-03-171-6/+15
* tcg/tci: Split out tcg_out_op_rrrbbRichard Henderson2021-03-171-7/+16
* tcg/tci: Split out tcg_out_op_rrrrrcRichard Henderson2021-03-171-9/+21
* tcg/tci: Split out tcg_out_op_rrrcRichard Henderson2021-03-171-6/+15
* tcg/tci: Split out tcg_out_op_rrrRichard Henderson2021-03-171-5/+14
* tcg/tci: Split out tcg_out_op_rrRichard Henderson2021-03-171-13/+23
* tcg/tci: Split out tcg_out_op_pRichard Henderson2021-03-171-6/+12
* tcg/tci: Split out tcg_out_op_lRichard Henderson2021-03-171-3/+11
* tcg/tci: Split out tcg_out_op_rrsRichard Henderson2021-03-171-43/+37Star
* tcg/tci: Push opcode emit into each caseRichard Henderson2021-03-171-3/+32
* tcg/tci: Implement the disassembler properlyRichard Henderson2021-03-171-0/+283
* tcg/tci: Remove tci_disasRichard Henderson2021-03-172-12/+0Star
* tcg/tci: Hoist op_size checking into tci_args_*Richard Henderson2021-03-171-14/+73
* tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}Richard Henderson2021-03-171-66/+81
* tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bitsRichard Henderson2021-03-172-6/+6
* tcg/tci: Clean up deposit operationsRichard Henderson2021-03-173-28/+30
* tcg/tci: Split out tci_args_rrrrRichard Henderson2021-03-171-5/+11
* tcg/tci: Split out tci_args_rrrrrrRichard Henderson2021-03-171-11/+20
* tcg/tci: Reuse tci_args_l for goto_tbRichard Henderson2021-03-173-23/+9Star
* tcg/tci: Reuse tci_args_l for exit_tbRichard Henderson2021-03-172-10/+5Star
* tcg/tci: Reuse tci_args_l for calls.Richard Henderson2021-03-171-19/+19
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 09:42:34 +0100