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* tracing: remove TCG memory access tracingAlex Bennée2022-02-091-5/+0Star
* cpuid: use unsigned for max cpuidMichael S. Tsirkin2022-02-041-1/+1
* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-0810-56/+56
* tcg/optimize: Fix folding of vector opsRichard Henderson2022-01-051-11/+38
* tcg/loongarch64: Register the JITWANG Xuerui2021-12-211-0/+44
* tcg/loongarch64: Implement tcg_target_initWANG Xuerui2021-12-211-0/+27
* tcg/loongarch64: Implement exit_tb/goto_tbWANG Xuerui2021-12-211-0/+19
* tcg/loongarch64: Implement tcg_target_qemu_prologueWANG Xuerui2021-12-211-0/+68
* tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui2021-12-212-0/+355
* tcg/loongarch64: Implement simple load/store opsWANG Xuerui2021-12-212-0/+132
* tcg/loongarch64: Implement tcg_out_callWANG Xuerui2021-12-211-0/+34
* tcg/loongarch64: Implement setcond opsWANG Xuerui2021-12-212-0/+70
* tcg/loongarch64: Implement br/brcond opsWANG Xuerui2021-12-212-0/+54
* tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui2021-12-213-8/+74
* tcg/loongarch64: Implement add/sub opsWANG Xuerui2021-12-212-0/+40
* tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui2021-12-213-2/+94
* tcg/loongarch64: Implement clz/ctz opsWANG Xuerui2021-12-213-4/+47
* tcg/loongarch64: Implement bswap{16,32,64} opsWANG Xuerui2021-12-212-5/+37
* tcg/loongarch64: Implement deposit/extract opsWANG Xuerui2021-12-213-4/+26
* tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui2021-12-213-8/+98
* tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui2021-12-213-12/+95
* tcg/loongarch64: Implement goto_ptrWANG Xuerui2021-12-212-0/+32
* tcg/loongarch64: Implement tcg_out_mov and tcg_out_moviWANG Xuerui2021-12-211-0/+137
* tcg/loongarch64: Implement the memory barrier opWANG Xuerui2021-12-211-0/+32
* tcg/loongarch64: Implement necessary relocation operationsWANG Xuerui2021-12-211-0/+66
* tcg/loongarch64: Define the operand constraintsWANG Xuerui2021-12-212-0/+80
* tcg/loongarch64: Add register names, allocation order and input/output setsWANG Xuerui2021-12-211-0/+118
* tcg/loongarch64: Add generated instruction opcodes and encoding helpersWANG Xuerui2021-12-211-0/+979
* tcg/loongarch64: Add the tcg-target.h fileWANG Xuerui2021-12-211-0/+180
* tcg/arm: Reduce vector alignment requirement for NEONRichard Henderson2021-12-072-5/+16
* tcg/s390x: Fix tcg_out_vec_op argument typeMiroslav Rezanina2021-11-111-1/+2
* tcg: Document ctpop opcodesRichard Henderson2021-11-111-0/+6
* tcg/optimize: Add an extra cast to fold_extract2Richard Henderson2021-11-111-1/+1
* qapi: introduce x-query-opcount QMP commandDaniel P. Berrangé2021-11-021-5/+5
* qapi: introduce x-query-jit QMP commandDaniel P. Berrangé2021-11-021-41/+47
* tcg/optimize: Propagate sign info for shiftingRichard Henderson2021-10-291-3/+47
* tcg/optimize: Propagate sign info for bit countingRichard Henderson2021-10-291-1/+2
* tcg/optimize: Propagate sign info for setcondRichard Henderson2021-10-291-0/+2
* tcg/optimize: Propagate sign info for logical operationsRichard Henderson2021-10-291-0/+29
* tcg/optimize: Optimize sign extensionsRichard Henderson2021-10-291-21/+102
* tcg/optimize: Use fold_xx_to_i for remRichard Henderson2021-10-291-1/+5
* tcg/optimize: Use fold_xi_to_x for divRichard Henderson2021-10-291-1/+5
* tcg/optimize: Use fold_xi_to_x for mulRichard Henderson2021-10-291-1/+2
* tcg/optimize: Use fold_xx_to_i for orcRichard Henderson2021-10-291-0/+1
* tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit valuesRichard Henderson2021-10-291-19/+16Star
* tcg: Extend call args using the correct opcodesRichard Henderson2021-10-291-3/+3
* tcg/optimize: Sink commutative operand swapping into fold functionsRichard Henderson2021-10-281-72/+70Star
* tcg/optimize: Expand fold_addsub2_i32 to 64-bit opsRichard Henderson2021-10-281-21/+44
* tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multipliesRichard Henderson2021-10-281-9/+35
* tcg/optimize: Split out fold_masksRichard Henderson2021-10-281-251/+294