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* tcg: Sink qemu_madvise call to common codeRichard Henderson2021-06-141-7/+7
* tcg: Return the map protection from alloc_code_gen_bufferRichard Henderson2021-06-141-30/+33
* tcg: Allocate code_gen_buffer into struct tcg_region_stateRichard Henderson2021-06-141-37/+27Star
* tcg: Move in_code_gen_buffer and tests to region.cRichard Henderson2021-06-112-23/+34
* tcg: Tidy split_cross_256mbRichard Henderson2021-06-111-10/+9Star
* tcg: Tidy tcg_n_regionsRichard Henderson2021-06-111-17/+12Star
* tcg: Rename region.start to region.after_prologueRichard Henderson2021-06-111-7/+8
* tcg: Replace region.end with region.total_sizeRichard Henderson2021-06-111-12/+18
* tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.hRichard Henderson2021-06-1110-28/+23Star
* tcg: Introduce tcg_max_ctxsRichard Henderson2021-06-113-17/+15Star
* accel/tcg: Pass down max_cpus to tcg_initRichard Henderson2021-06-113-28/+16Star
* tcg: Create tcg_initRichard Henderson2021-06-112-1/+9
* accel/tcg: Move alloc_code_gen_buffer to tcg/region.cRichard Henderson2021-06-111-5/+426
* tcg: Split out region.cRichard Henderson2021-06-114-544/+613
* tcg: Split out tcg_region_prologue_setRichard Henderson2021-06-111-15/+22
* tcg: Split out tcg_region_initial_allocRichard Henderson2021-06-111-3/+10
* tcg: Remove error return from tcg_region_initial_alloc__lockedRichard Henderson2021-06-111-13/+6Star
* tcg: Re-order tcg_region_init vs tcg_prologue_initRichard Henderson2021-06-111-33/+19Star
* meson: Split out tcg/meson.buildRichard Henderson2021-06-111-0/+13
* tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson2021-06-041-1/+34
* tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson2021-06-043-0/+17
* tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson2021-06-042-1/+63
* tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson2021-06-043-3/+22
* tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson2021-06-042-1/+25
* tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson2021-06-042-1/+25
* tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson2021-06-042-1/+7
* tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson2021-06-042-1/+28
* tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson2021-06-043-5/+44
* tcg/arm: Implement minimal vector operationsRichard Henderson2021-06-044-6/+202
* tcg/arm: Implement tcg_out_dup*_vecRichard Henderson2021-06-041-8/+275
* tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson2021-06-041-6/+46
* tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson2021-06-041-6/+64
* tcg/arm: Add host vector frameworkRichard Henderson2021-06-045-24/+158
* tcg: Change parameters for tcg_target_const_matchRichard Henderson2021-06-0410-36/+12Star
* docs: fix references to docs/devel/atomics.rstStefano Garzarella2021-06-021-1/+1
* tcg/aarch64: Fix tcg_out_rotlYasuo Kuwahara2021-05-271-3/+2Star
* Do not include cpu.h if it's not really necessaryThomas Huth2021-05-023-3/+0Star
* Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth2021-05-021-1/+0Star
* tcg/mips: Fix SoftTLB comparison on mips backendKele Huang2021-04-051-1/+1
* tcg: Workaround macOS 11.2 mprotect bugRichard Henderson2021-03-241-3/+7
* tcg: Do not set guard pages on the rx portion of code_gen_bufferRichard Henderson2021-03-241-7/+5Star
* tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina2021-03-178-19/+31
* tcg/tci: Split out tcg_out_op_r[iI]Richard Henderson2021-03-171-15/+35
* tcg/tci: Split out tcg_out_op_vRichard Henderson2021-03-171-4/+10
* tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}Richard Henderson2021-03-171-17/+53
* tcg/tci: Split out tcg_out_op_rrrrclRichard Henderson2021-03-171-8/+19
* tcg/tci: Split out tcg_out_op_rrrrRichard Henderson2021-03-171-6/+15
* tcg/tci: Split out tcg_out_op_rrrrrrRichard Henderson2021-03-171-8/+19
* tcg/tci: Split out tcg_out_op_rrclRichard Henderson2021-03-171-6/+15
* tcg/tci: Split out tcg_out_op_rrrbbRichard Henderson2021-03-171-7/+16
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-21 04:40:49 +0100