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path: root/tests/qapi-schema/reserved-member-q.err
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* qapi: Speed up frontend testsMarkus Armbruster2019-10-221-2/+2
* qapi: Avoid redundant definition references in error messagesMarkus Armbruster2019-09-281-1/+1
* qapi: Change frontend error messages to start with lower caseMarkus Armbruster2019-09-281-1/+1
* qapi: Prefix frontend errors with an "in definition" lineMarkus Armbruster2019-09-281-0/+1
* qapi: Back out doc comments added just to please qapi.pyMarkus Armbruster2017-03-161-1/+1
* qapi: add qapi2texi scriptMarc-André Lureau2017-01-161-1/+1
* qapi: Reserve 'q_*' and 'has_*' member namesEric Blake2015-11-021-0/+1
* tests/qapi-schema: Test for reserved names, empty structEric Blake2015-11-021-0/+0
ons'>-1/+5 * target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entryPeter Maydell2020-12-101-4/+12 * hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell2020-12-102-0/+8 * target/arm: Implement FPCXT_S fp system registerPeter Maydell2020-12-101-0/+58 * target/arm: Factor out preserve-fp-state from full_vfp_access_check()Peter Maydell2020-12-101-18/+27 * target/arm: Use new FPCR_NZCV_MASK constantPeter Maydell2020-12-101-2/+2 * target/arm: Implement M-profile FPSCR_nzcvqcPeter Maydell2020-12-102-0/+40 * target/arm: Implement VLDR/VSTR system registerPeter Maydell2020-12-102-0/+105 * target/arm: Move general-use constant expanders up in translate.cPeter Maydell2020-12-101-21/+25 * target/arm: Refactor M-profile VMSR/VMRS handlingPeter Maydell2020-12-102-11/+168 * target/arm: Enforce M-profile VMRS/VMSR register restrictionsPeter Maydell2020-12-101-1/+4 * target/arm: Implement CLRM instructionPeter Maydell2020-12-102-1/+43 * target/arm: Implement VSCCLRM insnPeter Maydell2020-12-104-11/+111 * target/arm: Don't clobber ID_PFR1.Security on M-profile coresPeter Maydell2020-12-101-1/+1 * target/arm: Implement v8.1M PXN extensionPeter Maydell2020-12-101-1/+6 * ppc/translate: Implement lxvwsx opcodeLemonBoy2020-11-242-0/+31 * target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0Peter Maydell2020-11-231-4/+8 * target/arm: fix stage 2 page-walks in 32-bit emulationRémi Denis-Courmont2020-11-231-2/+2 * s390/kvm: fix diag318 propagation and reset functionalityCollin Walling2020-11-185-5/+30 * hvf: Fix segment selector formatJessica Clarke2020-11-181-4/+4 * hvf: Gate RDTSCP on CPU_BASED2_RDTSCP, not just CPU_BASED_TSC_OFFSETJessica Clarke2020-11-181-0/+4 * Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201117'...Peter Maydell2020-11-171-3/+0Star |\ | * target/openrisc: Remove dead code attempting to check "is timer disabled"Peter Maydell2020-11-171-3/+0Star * | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-11-1...Peter Maydell2020-11-171-1/+2 |\ \ | |/ |/| | * target/microblaze: Fix possible array out of bounds in mmu_write()AlexChen2020-11-171-1/+2 * | target/i386: avoid theoretical leak on MCE injectionPaolo Bonzini2020-11-161-6/+4Star * | kvm/i386: Set proper nested state format for SVMTom Lendacky2020-11-161-4/+6 |/ * nomaintainer: Fix Lesser GPL version numberChetan Pant2020-11-155-5/+5 * sparc tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-1512-12/+12 * x86 hvf cpus: Fix Lesser GPL version numberChetan Pant2020-11-1517-18/+18 * overall/alpha tcg cpus|hppa: Fix Lesser GPL version numberChetan Pant2020-11-1518-18/+18 * arm tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-1530-30/+30 * x86 tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-1521-21/+21 * tricore tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1 * xtensa tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1 * microblaze tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-158-8/+8 * cris tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-1510-10/+10 * powerpc tcg: Fix Lesser GPL version numberChetan Pant2020-11-15