summaryrefslogtreecommitdiffstats
path: root/hw/remote/message.c
blob: 11d729845c5a10ebdf6e82c1f2e6676f7f944308 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
/*
 * Copyright © 2020, 2021 Oracle and/or its affiliates.
 *
 * This work is licensed under the terms of the GNU GPL-v2, version 2 or later.
 *
 * See the COPYING file in the top-level directory.
 *
 */

#include "qemu/osdep.h"
#include "qemu-common.h"

#include "hw/remote/machine.h"
#include "io/channel.h"
#include "hw/remote/mpqemu-link.h"
#include "qapi/error.h"
#include "sysemu/runstate.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
#include "hw/remote/memory.h"
#include "hw/remote/iohub.h"
#include "sysemu/reset.h"

static void process_config_write(QIOChannel *ioc, PCIDevice *dev,
                                 MPQemuMsg *msg, Error **errp);
static void process_config_read(QIOChannel *ioc, PCIDevice *dev,
                                MPQemuMsg *msg, Error **errp);
static void process_bar_write(QIOChannel *ioc, MPQemuMsg *msg, Error **errp);
static void process_bar_read(QIOChannel *ioc, MPQemuMsg *msg, Error **errp);
static void process_device_reset_msg(QIOChannel *ioc, PCIDevice *dev,
                                     Error **errp);

void coroutine_fn mpqemu_remote_msg_loop_co(void *data)
{
    g_autofree RemoteCommDev *com = (RemoteCommDev *)data;
    PCIDevice *pci_dev = NULL;
    Error *local_err = NULL;

    assert(com->ioc);

    pci_dev = com->dev;
    for (; !local_err;) {
        MPQemuMsg msg = {0};

        if (!mpqemu_msg_recv(&msg, com->ioc, &local_err)) {
            break;
        }

        if (!mpqemu_msg_valid(&msg)) {
            error_setg(&local_err, "Received invalid message from proxy"
                                   "in remote process pid="FMT_pid"",
                                   getpid());
            break;
        }

        switch (msg.cmd) {
        case MPQEMU_CMD_PCI_CFGWRITE:
            process_config_write(com->ioc, pci_dev, &msg, &local_err);
            break;
        case MPQEMU_CMD_PCI_CFGREAD:
            process_config_read(com->ioc, pci_dev, &msg, &local_err);
            break;
        case MPQEMU_CMD_BAR_WRITE:
            process_bar_write(com->ioc, &msg, &local_err);
            break;
        case MPQEMU_CMD_BAR_READ:
            process_bar_read(com->ioc, &msg, &local_err);
            break;
        case MPQEMU_CMD_SYNC_SYSMEM:
            remote_sysmem_reconfig(&msg, &local_err);
            break;
        case MPQEMU_CMD_SET_IRQFD:
            process_set_irqfd_msg(pci_dev, &msg);
            break;
        case MPQEMU_CMD_DEVICE_RESET:
            process_device_reset_msg(com->ioc, pci_dev, &local_err);
            break;
        default:
            error_setg(&local_err,
                       "Unknown command (%d) received for device %s"
                       " (pid="FMT_pid")",
                       msg.cmd, DEVICE(pci_dev)->id, getpid());
        }
    }

    if (local_err) {
        error_report_err(local_err);
        qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_ERROR);
    } else {
        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
    }
}

static void process_config_write(QIOChannel *ioc, PCIDevice *dev,
                                 MPQemuMsg *msg, Error **errp)
{
    ERRP_GUARD();
    PciConfDataMsg *conf = (PciConfDataMsg *)&msg->data.pci_conf_data;
    MPQemuMsg ret = { 0 };

    if ((conf->addr + sizeof(conf->val)) > pci_config_size(dev)) {
        error_setg(errp, "Bad address for PCI config write, pid "FMT_pid".",
                   getpid());
        ret.data.u64 = UINT64_MAX;
    } else {
        pci_default_write_config(dev, conf->addr, conf->val, conf->len);
    }

    ret.cmd = MPQEMU_CMD_RET;
    ret.size = sizeof(ret.data.u64);

    if (!mpqemu_msg_send(&ret, ioc, NULL)) {
        error_prepend(errp, "Error returning code to proxy, pid "FMT_pid": ",
                      getpid());
    }
}

static void process_config_read(QIOChannel *ioc, PCIDevice *dev,
                                MPQemuMsg *msg, Error **errp)
{
    ERRP_GUARD();
    PciConfDataMsg *conf = (PciConfDataMsg *)&msg->data.pci_conf_data;
    MPQemuMsg ret = { 0 };

    if ((conf->addr + sizeof(conf->val)) > pci_config_size(dev)) {
        error_setg(errp, "Bad address for PCI config read, pid "FMT_pid".",
                   getpid());
        ret.data.u64 = UINT64_MAX;
    } else {
        ret.data.u64 = pci_default_read_config(dev, conf->addr, conf->len);
    }

    ret.cmd = MPQEMU_CMD_RET;
    ret.size = sizeof(ret.data.u64);

    if (!mpqemu_msg_send(&ret, ioc, NULL)) {
        error_prepend(errp, "Error returning code to proxy, pid "FMT_pid": ",
                      getpid());
    }
}

static void process_bar_write(QIOChannel *ioc, MPQemuMsg *msg, Error **errp)
{
    ERRP_GUARD();
    BarAccessMsg *bar_access = &msg->data.bar_access;
    AddressSpace *as =
        bar_access->memory ? &address_space_memory : &address_space_io;
    MPQemuMsg ret = { 0 };
    MemTxResult res;
    uint64_t val;

    if (!is_power_of_2(bar_access->size) ||
       (bar_access->size > sizeof(uint64_t))) {
        ret.data.u64 = UINT64_MAX;
        goto fail;
    }

    val = cpu_to_le64(bar_access->val);

    res = address_space_rw(as, bar_access->addr, MEMTXATTRS_UNSPECIFIED,
                           (void *)&val, bar_access->size, true);

    if (res != MEMTX_OK) {
        error_setg(errp, "Bad address %"PRIx64" for mem write, pid "FMT_pid".",
                   bar_access->addr, getpid());
        ret.data.u64 = -1;
    }

fail:
    ret.cmd = MPQEMU_CMD_RET;
    ret.size = sizeof(ret.data.u64);

    if (!mpqemu_msg_send(&ret, ioc, NULL)) {
        error_prepend(errp, "Error returning code to proxy, pid "FMT_pid": ",
                      getpid());
    }
}

static void process_bar_read(QIOChannel *ioc, MPQemuMsg *msg, Error **errp)
{
    ERRP_GUARD();
    BarAccessMsg *bar_access = &msg->data.bar_access;
    MPQemuMsg ret = { 0 };
    AddressSpace *as;
    MemTxResult res;
    uint64_t val = 0;

    as = bar_access->memory ? &address_space_memory : &address_space_io;

    if (!is_power_of_2(bar_access->size) ||
       (bar_access->size > sizeof(uint64_t))) {
        val = UINT64_MAX;
        goto fail;
    }

    res = address_space_rw(as, bar_access->addr, MEMTXATTRS_UNSPECIFIED,
                           (void *)&val, bar_access->size, false);

    if (res != MEMTX_OK) {
        error_setg(errp, "Bad address %"PRIx64" for mem read, pid "FMT_pid".",
                   bar_access->addr, getpid());
        val = UINT64_MAX;
    }

fail:
    ret.cmd = MPQEMU_CMD_RET;
    ret.data.u64 = le64_to_cpu(val);
    ret.size = sizeof(ret.data.u64);

    if (!mpqemu_msg_send(&ret, ioc, NULL)) {
        error_prepend(errp, "Error returning code to proxy, pid "FMT_pid": ",
                      getpid());
    }
}

static void process_device_reset_msg(QIOChannel *ioc, PCIDevice *dev,
                                     Error **errp)
{
    DeviceClass *dc = DEVICE_GET_CLASS(dev);
    DeviceState *s = DEVICE(dev);
    MPQemuMsg ret = { 0 };

    if (dc->reset) {
        dc->reset(s);
    }

    ret.cmd = MPQEMU_CMD_RET;

    mpqemu_msg_send(&ret, ioc, errp);
}