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xtensa_ss = ss.source_set()
xtensa_ss.add(files(
'mx_pic.c',
'pic_cpu.c',
'xtensa_memory.c',
))
xtensa_ss.add(when: 'CONFIG_XTENSA_SIM', if_true: files('sim.c'))
xtensa_ss.add(when: 'CONFIG_XTENSA_VIRT', if_true: files('virt.c'))
xtensa_ss.add(when: 'CONFIG_XTENSA_XTFPGA', if_true: files('xtfpga.c'))
hw_arch += {'xtensa': xtensa_ss}
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