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Diffstat (limited to 'toolchain/gcc/4.2.2-avr32-2.1.5/905-avr32-optimize-movsf2-use-movh-to-move-immediates-into-register.patch')
-rw-r--r--toolchain/gcc/4.2.2-avr32-2.1.5/905-avr32-optimize-movsf2-use-movh-to-move-immediates-into-register.patch31
1 files changed, 31 insertions, 0 deletions
diff --git a/toolchain/gcc/4.2.2-avr32-2.1.5/905-avr32-optimize-movsf2-use-movh-to-move-immediates-into-register.patch b/toolchain/gcc/4.2.2-avr32-2.1.5/905-avr32-optimize-movsf2-use-movh-to-move-immediates-into-register.patch
new file mode 100644
index 000000000..08d972df2
--- /dev/null
+++ b/toolchain/gcc/4.2.2-avr32-2.1.5/905-avr32-optimize-movsf2-use-movh-to-move-immediates-into-register.patch
@@ -0,0 +1,31 @@
+Index: gcc-4.2.2/gcc/config/avr32/avr32.md
+===================================================================
+--- gcc-4.2.2.orig/gcc/config/avr32/avr32.md 2008-09-19 14:23:34.000000000 +0200
++++ gcc-4.2.2/gcc/config/avr32/avr32.md 2008-09-19 14:30:18.000000000 +0200
+@@ -803,14 +803,22 @@
+ (define_insn "*movsf_internal"
+ [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r,m")
+ (match_operand:SF 1 "general_operand" "r, G,F,m,r"))]
+- "TARGET_SOFT_FLOAT
+- && (register_operand (operands[0], SFmode)
+- || register_operand (operands[1], SFmode))"
++ "(register_operand (operands[0], SFmode)
++ || register_operand (operands[1], SFmode))"
+ {
+ switch (which_alternative) {
+ case 0:
+ case 1: return "mov\t%0, %1";
+- case 2: return "mov\t%0, lo(%1)\;orh\t%0, hi(%1)";
++ case 2:
++ {
++ HOST_WIDE_INT target_float[2];
++ real_to_target (target_float, CONST_DOUBLE_REAL_VALUE (operands[1]), SFmode);
++ if ( TARGET_V2_INSNS
++ && avr32_hi16_immediate_operand (GEN_INT (target_float[0]), VOIDmode) )
++ return "movh\t%0, hi(%1)";
++ else
++ return "mov\t%0, lo(%1)\;orh\t%0, hi(%1)";
++ }
+ case 3:
+ if ( (REG_P(XEXP(operands[1], 0))
+ && REGNO(XEXP(operands[1], 0)) == SP_REGNUM)