summaryrefslogtreecommitdiffstats
path: root/src/arch
diff options
context:
space:
mode:
authorSimon Rettberg2021-07-22 14:36:35 +0200
committerSimon Rettberg2021-07-22 14:36:35 +0200
commitfc21afb08c7b827b3cd4a77618f36a7abdc13494 (patch)
treef7909726a1d49cb834bfa9647621b29cb15caea4 /src/arch
parentMerge branch 'master' into openslx (diff)
parent[cloud] Retry DHCP aggressively in AWS EC2 (diff)
downloadipxe-fc21afb08c7b827b3cd4a77618f36a7abdc13494.tar.gz
ipxe-fc21afb08c7b827b3cd4a77618f36a7abdc13494.tar.xz
ipxe-fc21afb08c7b827b3cd4a77618f36a7abdc13494.zip
Merge branch 'master' into openslx
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/core/x86_bigint.c11
-rw-r--r--src/arch/x86/drivers/net/undinet.c11
-rw-r--r--src/arch/x86/image/bzimage.c52
-rw-r--r--src/arch/x86/image/initrd.c1
-rw-r--r--src/arch/x86/include/bits/bigint.h54
-rw-r--r--src/arch/x86/include/initrd.h7
-rw-r--r--src/arch/x86/include/ipxe/cpuid.h3
-rw-r--r--src/arch/x86/interface/pcbios/rtc_entropy.c11
-rw-r--r--src/arch/x86/prefix/unlzma.S2
9 files changed, 71 insertions, 81 deletions
diff --git a/src/arch/x86/core/x86_bigint.c b/src/arch/x86/core/x86_bigint.c
index 6413b2fa8..9a25bdad5 100644
--- a/src/arch/x86/core/x86_bigint.c
+++ b/src/arch/x86/core/x86_bigint.c
@@ -75,17 +75,18 @@ void bigint_multiply_raw ( const uint32_t *multiplicand0,
*
* a < 2^{n}, b < 2^{n} => ab < 2^{2n}
*/
- __asm__ __volatile__ ( "mull %4\n\t"
- "addl %%eax, (%5,%2,4)\n\t"
- "adcl %%edx, 4(%5,%2,4)\n\t"
+ __asm__ __volatile__ ( "mull %5\n\t"
+ "addl %%eax, (%6,%2,4)\n\t"
+ "adcl %%edx, 4(%6,%2,4)\n\t"
"\n1:\n\t"
- "adcl $0, 8(%5,%2,4)\n\t"
+ "adcl $0, 8(%6,%2,4)\n\t"
"inc %2\n\t"
/* Does not affect CF */
"jc 1b\n\t"
: "=&a" ( discard_a ),
"=&d" ( discard_d ),
- "=&r" ( index )
+ "=&r" ( index ),
+ "+m" ( *result )
: "0" ( multiplicand_element ),
"g" ( multiplier_element ),
"r" ( result_elements ),
diff --git a/src/arch/x86/drivers/net/undinet.c b/src/arch/x86/drivers/net/undinet.c
index 9b7d6d849..43cb18bfe 100644
--- a/src/arch/x86/drivers/net/undinet.c
+++ b/src/arch/x86/drivers/net/undinet.c
@@ -104,6 +104,13 @@ static union u_PXENV_ANY __bss16 ( undinet_params );
SEGOFF16_t __bss16 ( undinet_entry_point );
#define undinet_entry_point __use_data16 ( undinet_entry_point )
+/* Read TSC in real mode only when profiling */
+#if PROFILING
+#define RDTSC_IF_PROFILING "rdtsc\n\t"
+#else
+#define RDTSC_IF_PROFILING ""
+#endif
+
/** IRQ profiler */
static struct profiler undinet_irq_profiler __profiler =
{ .name = "undinet.irq" };
@@ -288,14 +295,14 @@ static int undinet_call ( struct undi_nic *undinic, unsigned int function,
*/
profile_start ( &profiler->total );
__asm__ __volatile__ ( REAL_CODE ( "pushl %%ebp\n\t" /* gcc bug */
- "rdtsc\n\t"
+ RDTSC_IF_PROFILING
"pushl %%eax\n\t"
"pushw %%es\n\t"
"pushw %%di\n\t"
"pushw %%bx\n\t"
"lcall *undinet_entry_point\n\t"
"movw %%ax, %%bx\n\t"
- "rdtsc\n\t"
+ RDTSC_IF_PROFILING
"addw $6, %%sp\n\t"
"popl %%edx\n\t"
"popl %%ebp\n\t" /* gcc bug */ )
diff --git a/src/arch/x86/image/bzimage.c b/src/arch/x86/image/bzimage.c
index 51498bf95..a782127a1 100644
--- a/src/arch/x86/image/bzimage.c
+++ b/src/arch/x86/image/bzimage.c
@@ -327,32 +327,6 @@ static void bzimage_set_cmdline ( struct image *image,
}
/**
- * Parse standalone image command line for cpio parameters
- *
- * @v image bzImage file
- * @v cpio CPIO header
- * @v cmdline Command line
- */
-static void bzimage_parse_cpio_cmdline ( struct image *image,
- struct cpio_header *cpio,
- const char *cmdline ) {
- char *arg;
- char *end;
- unsigned int mode;
-
- /* Look for "mode=" */
- if ( ( arg = strstr ( cmdline, "mode=" ) ) ) {
- arg += 5;
- mode = strtoul ( arg, &end, 8 /* Octal for file mode */ );
- if ( *end && ( *end != ' ' ) ) {
- DBGC ( image, "bzImage %p strange \"mode=\""
- "terminator '%c'\n", image, *end );
- }
- cpio_set_field ( cpio->c_mode, ( 0100000 | mode ) );
- }
-}
-
-/**
* Align initrd length
*
* @v len Length
@@ -374,11 +348,9 @@ static inline size_t bzimage_align ( size_t len ) {
static size_t bzimage_load_initrd ( struct image *image,
struct image *initrd,
userptr_t address ) {
- char *filename = initrd->cmdline;
- char *cmdline;
+ const char *filename = cpio_name ( initrd );
struct cpio_header cpio;
size_t offset;
- size_t name_len;
size_t pad_len;
/* Do not include kernel image itself as an initrd */
@@ -386,25 +358,7 @@ static size_t bzimage_load_initrd ( struct image *image,
return 0;
/* Create cpio header for non-prebuilt images */
- if ( filename && filename[0] ) {
- cmdline = strchr ( filename, ' ' );
- name_len = ( ( cmdline ? ( ( size_t ) ( cmdline - filename ) )
- : strlen ( filename ) ) + 1 /* NUL */ );
- memset ( &cpio, '0', sizeof ( cpio ) );
- memcpy ( cpio.c_magic, CPIO_MAGIC, sizeof ( cpio.c_magic ) );
- cpio_set_field ( cpio.c_mode, 0100644 );
- cpio_set_field ( cpio.c_nlink, 1 );
- cpio_set_field ( cpio.c_filesize, initrd->len );
- cpio_set_field ( cpio.c_namesize, name_len );
- if ( cmdline ) {
- bzimage_parse_cpio_cmdline ( image, &cpio,
- ( cmdline + 1 /* ' ' */ ));
- }
- offset = ( ( sizeof ( cpio ) + name_len + 0x03 ) & ~0x03 );
- } else {
- offset = 0;
- name_len = 0;
- }
+ offset = cpio_header ( initrd, &cpio );
/* Copy in initrd image body (and cpio header if applicable) */
if ( address ) {
@@ -413,7 +367,7 @@ static size_t bzimage_load_initrd ( struct image *image,
memset_user ( address, 0, 0, offset );
copy_to_user ( address, 0, &cpio, sizeof ( cpio ) );
copy_to_user ( address, sizeof ( cpio ), filename,
- ( name_len - 1 /* NUL (or space) */ ) );
+ cpio_name_len ( initrd ) );
}
DBGC ( image, "bzImage %p initrd %p [%#08lx,%#08lx,%#08lx)"
"%s%s\n", image, initrd, user_to_phys ( address, 0 ),
diff --git a/src/arch/x86/image/initrd.c b/src/arch/x86/image/initrd.c
index 49b959a91..d7b1f5773 100644
--- a/src/arch/x86/image/initrd.c
+++ b/src/arch/x86/image/initrd.c
@@ -29,6 +29,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#include <ipxe/uaccess.h>
#include <ipxe/init.h>
#include <ipxe/memblock.h>
+#include <ipxe/cpio.h>
/** @file
*
diff --git a/src/arch/x86/include/bits/bigint.h b/src/arch/x86/include/bits/bigint.h
index 4f1bc87ff..7443d6fdc 100644
--- a/src/arch/x86/include/bits/bigint.h
+++ b/src/arch/x86/include/bits/bigint.h
@@ -25,19 +25,22 @@ typedef uint32_t bigint_element_t;
static inline __attribute__ (( always_inline )) void
bigint_init_raw ( uint32_t *value0, unsigned int size,
const void *data, size_t len ) {
- long pad_len = ( sizeof ( bigint_t ( size ) ) - len );
+ bigint_t ( size ) __attribute__ (( may_alias )) *value =
+ ( ( void * ) value0 );
+ long pad_len = ( sizeof ( *value ) - len );
void *discard_D;
long discard_c;
/* Copy raw data in reverse order, padding with zeros */
__asm__ __volatile__ ( "\n1:\n\t"
- "movb -1(%2,%1), %%al\n\t"
+ "movb -1(%3,%1), %%al\n\t"
"stosb\n\t"
"loop 1b\n\t"
"xorl %%eax, %%eax\n\t"
- "mov %3, %1\n\t"
+ "mov %4, %1\n\t"
"rep stosb\n\t"
- : "=&D" ( discard_D ), "=&c" ( discard_c )
+ : "=&D" ( discard_D ), "=&c" ( discard_c ),
+ "+m" ( *value )
: "r" ( data ), "g" ( pad_len ), "0" ( value0 ),
"1" ( len )
: "eax" );
@@ -53,6 +56,8 @@ bigint_init_raw ( uint32_t *value0, unsigned int size,
static inline __attribute__ (( always_inline )) void
bigint_add_raw ( const uint32_t *addend0, uint32_t *value0,
unsigned int size ) {
+ bigint_t ( size ) __attribute__ (( may_alias )) *value =
+ ( ( void * ) value0 );
long index;
void *discard_S;
long discard_c;
@@ -60,11 +65,11 @@ bigint_add_raw ( const uint32_t *addend0, uint32_t *value0,
__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
"\n1:\n\t"
"lodsl\n\t"
- "adcl %%eax, (%3,%0,4)\n\t"
+ "adcl %%eax, (%4,%0,4)\n\t"
"inc %0\n\t" /* Does not affect CF */
"loop 1b\n\t"
: "=&r" ( index ), "=&S" ( discard_S ),
- "=&c" ( discard_c )
+ "=&c" ( discard_c ), "+m" ( *value )
: "r" ( value0 ), "1" ( addend0 ), "2" ( size )
: "eax" );
}
@@ -79,6 +84,8 @@ bigint_add_raw ( const uint32_t *addend0, uint32_t *value0,
static inline __attribute__ (( always_inline )) void
bigint_subtract_raw ( const uint32_t *subtrahend0, uint32_t *value0,
unsigned int size ) {
+ bigint_t ( size ) __attribute__ (( may_alias )) *value =
+ ( ( void * ) value0 );
long index;
void *discard_S;
long discard_c;
@@ -86,11 +93,11 @@ bigint_subtract_raw ( const uint32_t *subtrahend0, uint32_t *value0,
__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
"\n1:\n\t"
"lodsl\n\t"
- "sbbl %%eax, (%3,%0,4)\n\t"
+ "sbbl %%eax, (%4,%0,4)\n\t"
"inc %0\n\t" /* Does not affect CF */
"loop 1b\n\t"
: "=&r" ( index ), "=&S" ( discard_S ),
- "=&c" ( discard_c )
+ "=&c" ( discard_c ), "+m" ( *value )
: "r" ( value0 ), "1" ( subtrahend0 ),
"2" ( size )
: "eax" );
@@ -104,15 +111,18 @@ bigint_subtract_raw ( const uint32_t *subtrahend0, uint32_t *value0,
*/
static inline __attribute__ (( always_inline )) void
bigint_rol_raw ( uint32_t *value0, unsigned int size ) {
+ bigint_t ( size ) __attribute__ (( may_alias )) *value =
+ ( ( void * ) value0 );
long index;
long discard_c;
__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
"\n1:\n\t"
- "rcll $1, (%2,%0,4)\n\t"
+ "rcll $1, (%3,%0,4)\n\t"
"inc %0\n\t" /* Does not affect CF */
"loop 1b\n\t"
- : "=&r" ( index ), "=&c" ( discard_c )
+ : "=&r" ( index ), "=&c" ( discard_c ),
+ "+m" ( *value )
: "r" ( value0 ), "1" ( size ) );
}
@@ -124,13 +134,15 @@ bigint_rol_raw ( uint32_t *value0, unsigned int size ) {
*/
static inline __attribute__ (( always_inline )) void
bigint_ror_raw ( uint32_t *value0, unsigned int size ) {
+ bigint_t ( size ) __attribute__ (( may_alias )) *value =
+ ( ( void * ) value0 );
long discard_c;
__asm__ __volatile__ ( "clc\n\t"
"\n1:\n\t"
- "rcrl $1, -4(%1,%0,4)\n\t"
+ "rcrl $1, -4(%2,%0,4)\n\t"
"loop 1b\n\t"
- : "=&c" ( discard_c )
+ : "=&c" ( discard_c ), "+m" ( *value )
: "r" ( value0 ), "0" ( size ) );
}
@@ -239,6 +251,8 @@ bigint_max_set_bit_raw ( const uint32_t *value0, unsigned int size ) {
static inline __attribute__ (( always_inline )) void
bigint_grow_raw ( const uint32_t *source0, unsigned int source_size,
uint32_t *dest0, unsigned int dest_size ) {
+ bigint_t ( dest_size ) __attribute__ (( may_alias )) *dest =
+ ( ( void * ) dest0 );
long pad_size = ( dest_size - source_size );
void *discard_D;
void *discard_S;
@@ -246,10 +260,10 @@ bigint_grow_raw ( const uint32_t *source0, unsigned int source_size,
__asm__ __volatile__ ( "rep movsl\n\t"
"xorl %%eax, %%eax\n\t"
- "mov %3, %2\n\t"
+ "mov %4, %2\n\t"
"rep stosl\n\t"
: "=&D" ( discard_D ), "=&S" ( discard_S ),
- "=&c" ( discard_c )
+ "=&c" ( discard_c ), "+m" ( *dest )
: "g" ( pad_size ), "0" ( dest0 ),
"1" ( source0 ), "2" ( source_size )
: "eax" );
@@ -266,13 +280,15 @@ bigint_grow_raw ( const uint32_t *source0, unsigned int source_size,
static inline __attribute__ (( always_inline )) void
bigint_shrink_raw ( const uint32_t *source0, unsigned int source_size __unused,
uint32_t *dest0, unsigned int dest_size ) {
+ bigint_t ( dest_size ) __attribute__ (( may_alias )) *dest =
+ ( ( void * ) dest0 );
void *discard_D;
void *discard_S;
long discard_c;
__asm__ __volatile__ ( "rep movsl\n\t"
: "=&D" ( discard_D ), "=&S" ( discard_S ),
- "=&c" ( discard_c )
+ "=&c" ( discard_c ), "+m" ( *dest )
: "0" ( dest0 ), "1" ( source0 ),
"2" ( dest_size )
: "eax" );
@@ -289,15 +305,19 @@ bigint_shrink_raw ( const uint32_t *source0, unsigned int source_size __unused,
static inline __attribute__ (( always_inline )) void
bigint_done_raw ( const uint32_t *value0, unsigned int size __unused,
void *out, size_t len ) {
+ struct {
+ uint8_t bytes[len];
+ } __attribute__ (( may_alias )) *out_bytes = out;
void *discard_D;
long discard_c;
/* Copy raw data in reverse order */
__asm__ __volatile__ ( "\n1:\n\t"
- "movb -1(%2,%1), %%al\n\t"
+ "movb -1(%3,%1), %%al\n\t"
"stosb\n\t"
"loop 1b\n\t"
- : "=&D" ( discard_D ), "=&c" ( discard_c )
+ : "=&D" ( discard_D ), "=&c" ( discard_c ),
+ "+m" ( *out_bytes )
: "r" ( value0 ), "0" ( out ), "1" ( len )
: "eax" );
}
diff --git a/src/arch/x86/include/initrd.h b/src/arch/x86/include/initrd.h
index ddb3e5a45..2fb9d3d3a 100644
--- a/src/arch/x86/include/initrd.h
+++ b/src/arch/x86/include/initrd.h
@@ -11,13 +11,6 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#include <ipxe/uaccess.h>
-/** Minimum alignment for initrds
- *
- * Some versions of Linux complain about initrds that are not
- * page-aligned.
- */
-#define INITRD_ALIGN 4096
-
/** Minimum free space required to reshuffle initrds
*
* Chosen to avoid absurdly long reshuffling times
diff --git a/src/arch/x86/include/ipxe/cpuid.h b/src/arch/x86/include/ipxe/cpuid.h
index b5403bd9d..3983dfb89 100644
--- a/src/arch/x86/include/ipxe/cpuid.h
+++ b/src/arch/x86/include/ipxe/cpuid.h
@@ -42,6 +42,9 @@ struct x86_features {
/** Hypervisor is present */
#define CPUID_FEATURES_INTEL_ECX_HYPERVISOR 0x80000000UL
+/** TSC is present */
+#define CPUID_FEATURES_INTEL_EDX_TSC 0x00000010UL
+
/** FXSAVE and FXRSTOR are supported */
#define CPUID_FEATURES_INTEL_EDX_FXSR 0x01000000UL
diff --git a/src/arch/x86/interface/pcbios/rtc_entropy.c b/src/arch/x86/interface/pcbios/rtc_entropy.c
index e9e6baa59..e0c175685 100644
--- a/src/arch/x86/interface/pcbios/rtc_entropy.c
+++ b/src/arch/x86/interface/pcbios/rtc_entropy.c
@@ -36,6 +36,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#include <biosint.h>
#include <pic8259.h>
#include <rtc.h>
+#include <ipxe/cpuid.h>
#include <ipxe/entropy.h>
/** Maximum time to wait for an RTC interrupt, in milliseconds */
@@ -174,8 +175,17 @@ static int rtc_entropy_check ( void ) {
* @ret rc Return status code
*/
static int rtc_entropy_enable ( void ) {
+ struct x86_features features;
int rc;
+ /* Check that TSC is supported */
+ x86_features ( &features );
+ if ( ! ( features.intel.edx & CPUID_FEATURES_INTEL_EDX_TSC ) ) {
+ DBGC ( &rtc_flag, "RTC has no TSC\n" );
+ rc = -ENOTSUP;
+ goto err_no_tsc;
+ }
+
/* Hook ISR and enable RTC interrupts */
rtc_hook_isr();
enable_irq ( RTC_IRQ );
@@ -191,6 +201,7 @@ static int rtc_entropy_enable ( void ) {
rtc_disable_int();
disable_irq ( RTC_IRQ );
rtc_unhook_isr();
+ err_no_tsc:
return rc;
}
diff --git a/src/arch/x86/prefix/unlzma.S b/src/arch/x86/prefix/unlzma.S
index 956eeb24c..979f699ee 100644
--- a/src/arch/x86/prefix/unlzma.S
+++ b/src/arch/x86/prefix/unlzma.S
@@ -44,7 +44,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
*/
.text
- .arch i586
+ .arch i486
.section ".prefix.lib", "ax", @progbits
#ifdef CODE16