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author | Michael Brown | 2016-06-09 10:36:28 +0200 |
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committer | Michael Brown | 2016-06-09 10:36:28 +0200 |
commit | f76210961c76a3f54f673d668e21e30d2eed9612 (patch) | |
tree | df0eb4b64085a587d2df39bcee478a6b320b9c01 /src/arch | |
parent | [libc] Always use a non-zero seed for the (non-crypto) RNG (diff) | |
download | ipxe-f76210961c76a3f54f673d668e21e30d2eed9612.tar.gz ipxe-f76210961c76a3f54f673d668e21e30d2eed9612.tar.xz ipxe-f76210961c76a3f54f673d668e21e30d2eed9612.zip |
[pci] Support systems with multiple PCI root bridges
Extend the 16-bit PCI bus:dev.fn address to a 32-bit seg:bus:dev.fn
address, assuming a segment value of zero in contexts where multiple
segments are unsupported by the underlying data structures (e.g. in
the iBFT or BOFM tables).
Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/core/pcidirect.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/arch/x86/core/pcidirect.c b/src/arch/x86/core/pcidirect.c index 9b8e6b1d..0d09be84 100644 --- a/src/arch/x86/core/pcidirect.c +++ b/src/arch/x86/core/pcidirect.c @@ -36,10 +36,12 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); * Prepare for Type 1 PCI configuration space access * * @v pci PCI device - * @v where Location within PCI configuration space + * @v where Location within PCI configuration space */ void pcidirect_prepare ( struct pci_device *pci, int where ) { - outl ( ( 0x80000000 | ( pci->busdevfn << 8 ) | ( where & ~3 ) ), + uint16_t busdevfn = ( pci->busdevfn & 0xffff ); + + outl ( ( 0x80000000 | ( busdevfn << 8 ) | ( where & ~3 ) ), PCIDIRECT_CONFIG_ADDRESS ); } |