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| author | Michael Brown | 2008-12-12 20:15:00 +0100 |
|---|---|---|
| committer | Michael Brown | 2008-12-12 20:15:00 +0100 |
| commit | 1941c933f8c80a39efd93a0da2a5a44ad0593970 (patch) | |
| tree | c02518825e821fafd1ada19417e4c2452173baa4 /src/drivers/bus | |
| parent | [e1000] Use PCI_BASE_ADDRESS_* symbols instead of integers (diff) | |
| download | ipxe-1941c933f8c80a39efd93a0da2a5a44ad0593970.tar.gz ipxe-1941c933f8c80a39efd93a0da2a5a44ad0593970.tar.xz ipxe-1941c933f8c80a39efd93a0da2a5a44ad0593970.zip | |
[pci] Enable memory cycles in adjust_pci_device()
adjust_pci_device() has historically enabled bus-mastering and I/O
cycles, but has never previously needed to enable memory cycles. Some
EFI systems seem not to enable memory cycles by default, so add that
to the list of PCI command register bits that we force on.
Diffstat (limited to 'src/drivers/bus')
| -rw-r--r-- | src/drivers/bus/pci.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/drivers/bus/pci.c b/src/drivers/bus/pci.c index 54d1136fa..2dc9d43a8 100644 --- a/src/drivers/bus/pci.c +++ b/src/drivers/bus/pci.c @@ -148,7 +148,8 @@ void adjust_pci_device ( struct pci_device *pci ) { unsigned char pci_latency; pci_read_config_word ( pci, PCI_COMMAND, &pci_command ); - new_command = pci_command | PCI_COMMAND_MASTER | PCI_COMMAND_IO; + new_command = ( pci_command | PCI_COMMAND_MASTER | + PCI_COMMAND_MEM | PCI_COMMAND_IO ); if ( pci_command != new_command ) { DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! " "Updating PCI command %04x->%04x\n", pci->bus, |