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| author | Michael Brown | 2016-03-12 18:51:59 +0100 |
|---|---|---|
| committer | Michael Brown | 2016-03-12 18:51:59 +0100 |
| commit | 4350d26a04e38ecbac95164068cdea7d589c24a4 (patch) | |
| tree | 08caf51668aa49ee152d2d861aa3126913fb5d03 /src/drivers/infiniband | |
| parent | [linda] Use standard readq() and writeq() implementations (diff) | |
| download | ipxe-4350d26a04e38ecbac95164068cdea7d589c24a4.tar.gz ipxe-4350d26a04e38ecbac95164068cdea7d589c24a4.tar.xz ipxe-4350d26a04e38ecbac95164068cdea7d589c24a4.zip | |
[qib7322] Use standard readq() and writeq() implementations
Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/drivers/infiniband')
| -rw-r--r-- | src/drivers/infiniband/qib7322.c | 34 |
1 files changed, 8 insertions, 26 deletions
diff --git a/src/drivers/infiniband/qib7322.c b/src/drivers/infiniband/qib7322.c index e22f2349..08cedcb7 100644 --- a/src/drivers/infiniband/qib7322.c +++ b/src/drivers/infiniband/qib7322.c @@ -137,32 +137,21 @@ struct qib7322 { * This card requires atomic 64-bit accesses. Strange things happen * if you try to use 32-bit accesses; sometimes they work, sometimes * they don't, sometimes you get random data. - * - * These accessors use the "movq" MMX instruction, and so won't work - * on really old Pentiums (which won't have PCIe anyway, so this is - * something of a moot point). */ /** * Read QIB7322 qword register * * @v qib7322 QIB7322 device - * @v dwords Register buffer to read into + * @v qword Register buffer to read into * @v offset Register offset */ -static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords, +static void qib7322_readq ( struct qib7322 *qib7322, uint64_t *qword, unsigned long offset ) { - void *addr = ( qib7322->regs + offset ); - - __asm__ __volatile__ ( "movq (%1), %%mm0\n\t" - "movq %%mm0, (%0)\n\t" - : : "r" ( dwords ), "r" ( addr ) : "memory" ); - - DBGIO ( "[%08lx] => %08x%08x\n", - virt_to_phys ( addr ), dwords[1], dwords[0] ); + *qword = readq ( qib7322->regs + offset ); } #define qib7322_readq( _qib7322, _ptr, _offset ) \ - qib7322_readq ( (_qib7322), (_ptr)->u.dwords, (_offset) ) + qib7322_readq ( (_qib7322), (_ptr)->u.qwords, (_offset) ) #define qib7322_readq_array8b( _qib7322, _ptr, _offset, _idx ) \ qib7322_readq ( (_qib7322), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) ) #define qib7322_readq_array64k( _qib7322, _ptr, _offset, _idx ) \ @@ -174,22 +163,15 @@ static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords, * Write QIB7322 qword register * * @v qib7322 QIB7322 device - * @v dwords Register buffer to write + * @v qword Register buffer to write * @v offset Register offset */ -static void qib7322_writeq ( struct qib7322 *qib7322, const uint32_t *dwords, +static void qib7322_writeq ( struct qib7322 *qib7322, const uint64_t *qword, unsigned long offset ) { - void *addr = ( qib7322->regs + offset ); - - DBGIO ( "[%08lx] <= %08x%08x\n", - virt_to_phys ( addr ), dwords[1], dwords[0] ); - - __asm__ __volatile__ ( "movq (%0), %%mm0\n\t" - "movq %%mm0, (%1)\n\t" - : : "r" ( dwords ), "r" ( addr ) : "memory" ); + writeq ( *qword, ( qib7322->regs + offset ) ); } #define qib7322_writeq( _qib7322, _ptr, _offset ) \ - qib7322_writeq ( (_qib7322), (_ptr)->u.dwords, (_offset) ) + qib7322_writeq ( (_qib7322), (_ptr)->u.qwords, (_offset) ) #define qib7322_writeq_array8b( _qib7322, _ptr, _offset, _idx ) \ qib7322_writeq ( (_qib7322), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) ) #define qib7322_writeq_array64k( _qib7322, _ptr, _offset, _idx ) \ |